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    Memory system with nonvolatile cache and control method thereof
    12.
    发明授权
    Memory system with nonvolatile cache and control method thereof 有权

    公开(公告)号：US11355197B2

    公开(公告)日：2022-06-07

    申请号：US16788586

    申请日：2020-02-12

    Applicant: KIOXIA CORPORATION

    Inventor： Shunichi Igahara ,  Toshikatsu Hida

    IPC: G06F12/00 ,  G11C16/10 ,  G06F3/06 ,  G11C7/10 ,  G06F12/02 ,  G11C16/08 ,  G11C11/56 ,  G11C16/34

    Abstract: A memory system includes a non-volatile memory having a plurality of memory cells, and a controller configured to carry out write operations in a first mode in which n-bit data is written per target memory cell of the non-volatile memory until an allowable data amount of data items has been written, and then, in a second mode in which m-bit data is written per target memory cell of the non-volatile memory, where n is an integer of one or more and m is an integer greater than n. The controller is further configured to detect that an idle state, in which a command has not been received from the host, has continued for a threshold period of time or more, increase the allowable data amount in response thereto, and after the increase, carry out a write operation to write data items in the non-volatile memory in the first mode.

    Reading of start-up information from different memory regions of a memory system
    13.
    发明授权
    Reading of start-up information from different memory regions of a memory system 有权

    公开(公告)号：US11042310B2

    公开(公告)日：2021-06-22

    申请号：US16506475

    申请日：2019-07-09

    Applicant: KIOXIA CORPORATION

    Inventor： Riki Suzuki ,  Toshikatsu Hida ,  Takehiko Amaki ,  Shunichi Igahara

    IPC: G06F3/06 ,  G06F11/10 ,  G11C29/00 ,  G06F12/02 ,  G06F12/0875 ,  G11C29/52

    Abstract: A memory system includes a nonvolatile semiconductor memory including a first memory region for storing start-up information and a second memory region for storing a copy of the start-up information, a volatile semiconductor memory, and a controller. The controller is configured to determine whether or not an address of the second memory region is stored in the volatile semiconductor memory, issue a first start-up read command, which designates no read address, to the nonvolatile semiconductor memory to read the start-up information from the first memory region if the address of the second memory region is not stored in the volatile semiconductor memory, and issue a second start-up read command, which designates the address of the second memory region as a read address, to read the start-up information from the second memory region if the address of the second memory region is stored in the volatile semiconductor memory.

    MEMORY SYSTEM
    16.
    发明公开
    MEMORY SYSTEM 审中-公开

    公开(公告)号：US20230367487A1

    公开(公告)日：2023-11-16

    申请号：US18088129

    申请日：2022-12-23

    Applicant: Kioxia Corporation

    Inventor： Yoshihisa Kojima ,  Shunichi Igahara ,  Toshikatsu Hida

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/064 ,  G06F3/0679

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a first block that includes first and second sub-blocks. The memory controller instructs the non-volatile memory to execute a data erase process in units of sub-blocks on data stored in the non-volatile memory. In response to a first value corresponding to the first sub-block having reached a first threshold value, the memory controller reads first data from the first sub-block, executes an error correction process on the first data read from the first sub-block, and writes the first data on which the error correction process has been executed into the non-volatile memory.

    Memory system
    18.
    发明授权
    Memory system 有权

    公开(公告)号：US11462256B2

    公开(公告)日：2022-10-04

    申请号：US17349248

    申请日：2021-06-16

    Applicant: Kioxia Corporation

    Inventor： Shohei Asami ,  Toshikatsu Hida ,  Riki Suzuki

    IPC: G11C11/40 ,  G11C11/406 ,  G11C16/16 ,  G11C16/10 ,  G11C16/34

    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The non-volatile memory includes a plurality of groups, each including a plurality of memory cells. The memory controller is configured to determine whether to execute a refresh process for a first group based on whether a first temperature in a write process for the first group and a second temperature after the write process for the first group satisfy a first condition.

    Storage device, storage system, and control method
    20.
    发明授权
    Storage device, storage system, and control method 有权

    公开(公告)号：US12293106B2

    公开(公告)日：2025-05-06

    申请号：US17447088

    申请日：2021-09-08

    Applicant: Kioxia Corporation

    Inventor： Takehiko Amaki ,  Shunichi Igahara ,  Toshikatsu Hida ,  Yoshihisa Kojima

    IPC: G06F3/06

    Abstract: According to one embodiment, a storage device comprises a nonvolatile memory, and a controller configured to perform a first data write operation in a first mode, and to perform a second data write operation in a second mode. Data of a first number of bits is written per memory cell in the first mode. Data of a second number of bits is written per memory cell in the second mode. The second number is larger than the first number. The controller reserves one or more free blocks as write destination block candidates of the first data write operation, perform the first data write operation for one of the write destination block candidates, and perform a garbage collection.

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