公开(公告)号：US10559475B2

公开(公告)日：2020-02-11

申请号：US16255606

申请日：2019-01-23

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill ,  Richard Janek

IPC: H01L21/3213 ,  H01L21/02 ,  H01L21/311 ,  H01L21/225 ,  H01L21/326 ,  H01L21/67

Abstract: A method for performing atomic layer etching (ALE) on a substrate is provided, including the following operations: performing a surface modification operation on a substrate surface, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer, wherein a bias voltage is applied during the surface modification operation, the bias voltage configured to control a depth of the substrate surface that is converted by the surface modification operation; performing a removal operation on the substrate surface, the removal operation configured to remove at least a portion of the modified layer from the substrate surface, wherein removing the portion of the modified layer includes applying thermal energy to effect desorption of the portion of the modified layer. A plasma treatment can be performed to remove residues from the substrate surface following the removal operation.

公开(公告)号：US10354887B2

公开(公告)日：2019-07-16

申请号：US15717076

申请日：2017-09-27

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Nerissa Draeger

IPC: H01L21/311 ,  H01L21/02 ,  H01L21/67 ,  H01J37/32

Abstract: A method for etching a metal oxide layer on a semiconductor substrate, comprising providing a plurality of cycles, is provided. Each cycle comprises exposing the metal oxide layer to a reactive hydrogen-containing gas or plasma to transform a part of the metal oxide layer into a layer of metal hydride, stopping the exposing the metal oxide layer to the reactive hydrogen-containing gas or plasma, heating the layer of metal hydride to at least a sublimation temperature to sublime the layer of metal hydride, and cooling the metal oxide layer to a temperature below the sublimation temperature.

公开(公告)号：US10229837B2

公开(公告)日：2019-03-12

申请号：US15615691

申请日：2017-06-06

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill ,  Richard Janek

IPC: H01L21/3213 ,  H01L21/02 ,  H01L21/311 ,  H01L21/225 ,  H01L21/326

Abstract: A method for performing atomic layer etching (ALE) on a substrate is provided, including the following operations: performing a surface modification operation on a substrate surface, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer, wherein a bias voltage is applied during the surface modification operation, the bias voltage configured to control a depth of the substrate surface that is converted by the surface modification operation; performing a removal operation on the substrate surface, the removal operation configured to remove at least a portion of the modified layer from the substrate surface, wherein removing the portion of the modified layer is effected via a ligand exchange reaction that is configured to volatilize the portion of the modified layer. A plasma treatment can be performed to remove residues from the substrate surface following the removal operation.

公开(公告)号：US20180182634A1

公开(公告)日：2018-06-28

申请号：US15849306

申请日：2017-12-20

Applicant: Lam Research Corporation

Inventor： David Smith ,  Thorsten Lill ,  Andreas Fischer

IPC: H01L21/3065 ,  H01L21/768 ,  H01J37/32

Abstract: A method for performing atomic layer etching of a surface of a substrate is provided, including: performing a surface conversion operation by exposing the surface of the substrate to a surface conversion reactant; performing a ligand exchange operation by exposing the surface of the substrate to a ligand containing reactant; performing a desorption operation that effects removal of surface species from the surface of the substrate; performing a purge operation; repeating the surface conversion operation, the ligand exchange operation, the desorption operation, and the purge operation, for a predefined number of cycles.

公开(公告)号：US20170250059A1

公开(公告)日：2017-08-31

申请号：US15594572

申请日：2017-05-13

Applicant: Lam Research Corporation

Inventor： Andreas Fischer

IPC: H01J37/32

CPC classification number: H01J37/32623 ,  C23C16/50 ,  H01J37/32091 ,  H01J37/32357 ,  H01J37/32449 ,  H01J37/32513 ,  H01J37/32899

Abstract: A plasma processing system having at least one processing chamber comprising at least two sub-chambers is provided. The two plasma sub-chambers are in plasma flow or gas flow communication through a passage, which is controlled by a gate. The gate may be operated to allow plasma migration between the two sub-chambers to occur at different conductance rates. In one example, the gate comprises two plates with openings through the plates. At least one of the plates may be rotatable relative to the other plates to govern the conductance rate of the plasma from one sub-chamber to the other sub-chamber.

公开(公告)号：US09609730B2

公开(公告)日：2017-03-28

申请号：US14539121

申请日：2014-11-12

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Thorsten Lill

IPC: H01L21/00 ,  H05G2/00 ,  H01L21/3065 ,  H01J37/32 ,  H01L21/66

CPC classification number: H01L21/67069 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/321 ,  H01J37/32449 ,  H01J37/32972 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/67253 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26 ,  H05G2/003

Abstract: Disclosed are methods of adjusting the emission of vacuum ultraviolet (VUV) radiation from a plasma in a semiconductor processing chamber. The methods may include generating a plasma in the processing chamber which includes a VUV-emitter gas and a collisional energy absorber gas, and adjusting the emission of VUV radiation from the plasma by altering the concentration ratio of the VUV-emitter gas to collisional energy absorber gas in the plasma. In some embodiments, the VUV-emitter gas may be helium and the collisional energy absorber gas may be neon, and in certain such embodiments, adjusting VUV emission may include flowing helium and/or neon into the processing chamber in a proportion so as to alter the concentration ratio of helium to neon in the plasma. Also disclosed are apparatuses which implement the foregoing methods.

公开(公告)号：US09548186B2

公开(公告)日：2017-01-17

申请号：US14495553

申请日：2014-09-24

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Eric Hudson

IPC: C23C16/50 ,  C23C16/503 ,  C23C16/505 ,  C23C16/509 ,  H01L21/306 ,  C23F1/00 ,  H01J37/32 ,  H01L21/3065 ,  C23C16/06 ,  C23C16/22

CPC classification number: H01J37/32091 ,  H01J37/32449 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32623 ,  H01J37/32642 ,  H01J37/32816 ,  H01J37/3299 ,  H01L21/3065

Abstract: A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically coupled to a periphery of the upper electrode, where the UE-PE is configured to be non-coplanar with the upper electrode. The plasma processing system further includes a cover ring. The cover ring is configured to concentrically surround the lower electrode, where the UE-PE and the cover ring forms a second gap.

Abstract translation: 提供了一种等离子体处理系统，其具有用于处理基板的等离子体处理室。 等离子体处理系统至少包括用于处理衬底的上电极和下电极。 在等离子体处理期间，衬底设置在下电极上，其中上电极和衬底形成第一间隙。 等离子体处理系统还包括上电极周边延伸（UE-PE）。 UE-PE机械地耦合到上电极的周边，其中UE-PE被配置为与上电极非共面。 等离子体处理系统还包括盖环。 盖环被配置为同心地围绕下电极，其中UE-PE和盖环形成第二间隙。

公开(公告)号：US20150024594A1

公开(公告)日：2015-01-22

申请号：US13943908

申请日：2013-07-17

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Dean Larson

IPC: H01L21/687 ,  H01J37/32 ,  H01L21/67 ,  H01L21/306 ,  H01L21/02

CPC classification number: H01L21/68742 ,  H01J37/32715 ,  H01J37/32724 ,  H01L21/67109

Abstract: A semiconductor substrate processing apparatus includes a cooled pin lifter paddle for raising and lowering a semiconductor substrate. The semiconductor substrate processing apparatus comprises a processing chamber in which the semiconductor substrate is processed, a heated pedestal for supporting the semiconductor substrate in the processing chamber, and the cooled pin lifter paddle located below the pedestal. The cooled pin lifter paddle includes a heat shield and at least one flow passage in an outer peripheral portion thereof through which a coolant can be circulated to remove heat absorbed by the heat shield of the cooled pin lifter paddle. The cooled pin lifter paddle is vertically movable such that lift pins on an upper surface of the heat shield travel through corresponding holes in the pedestal and a source of coolant is in flow communication with the at least one flow passage.

Abstract translation: 半导体基板处理装置包括用于升高和降低半导体基板的冷却引脚升降器叶片。 半导体基板处理装置包括处理半导体基板的处理室，用于将处理室中的半导体基板支撑的加热基座和位于基座下方的冷却引脚升降器叶片。 冷却的升降器桨叶包括隔热罩和至少一个在其外周部分中的流动通道，冷却剂可以通过该通道循环，以消除由冷却的升降器桨叶的隔热板吸收的热量。 冷却的销钉升降器叶片是可垂直移动的，使得热屏蔽件的上表面上的提升销穿过基座中的相应的孔并且冷却剂源与至少一个流动通道流动连通。

公开(公告)号：US20250140529A1

公开(公告)日：2025-05-01

申请号：US18835328

申请日：2022-12-19

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Gnanamani Amburose ,  Julien Monbeig

IPC: H01J37/32 ,  H01L21/683

Abstract: A confinement ring for use in a process chamber includes a tubular extension that is configured to surrounds a process region in the process chamber. An upper end of the tubular extension is configured to connect to a showerhead of the process chamber and a lower end that is configured to extend into the process region and proximate to an edge ring that surrounds a wafer received within the process region. A foot extension has an inner end that joins to the lower end of the tubular extension and extends outwardly from the process region to the outer end. The foot extension provides an annular surface that is configured to form a gap with a top surface of the edge ring.

公开(公告)号：US20250125155A1

公开(公告)日：2025-04-17

申请号：US18688739

申请日：2022-09-06

Applicant: Lam Research Corporation

Inventor： Andreas Fischer ,  Aaron Lynn Routzahn ,  Thorsten Bernd Lill

IPC: H01L21/311 ,  H01L21/67

Abstract: Methods and apparatuses for etching materials using a boron trichloride during atomic layer etching are provided. The method comprises providing a wafer to a processing chamber, the wafer having an oxygen-containing material, exposing the oxygen-containing material to a halogen-containing gas to form a modified oxygen-containing layer on a surface of the wafer, and exposing the modified oxygen-containing layer to the boron trichloride to remove the modified layer from the surface of the wafer.