公开(公告)号：US09381387B2

公开(公告)日：2016-07-05

申请号：US13999917

申请日：2014-04-02

申请人： David C. Douglas

发明人： David C. Douglas

IPC分类号： A62C2/06 ,  A62C2/10 ,  A62C3/02

CPC分类号： A62C3/0264 ,  A62C2/06 ,  A62C2/065 ,  A62C3/0214

摘要： A fire-protection mechanism is described. The fire-protection mechanism includes multiple, overlapping cavities that can be filled with water (and, more generally, a fluid). When the fire-protection mechanism is deployed over an object, such as a building, and the cavities are filled with water, the fire-protection mechanism reduces the likelihood that the object is damaged by the heat associated with a fire proximate to the object, such as a wild fire. In particular, the heat capacity and latent heat of the water significantly increase the thermal time constant of the object, thereby reducing the likelihood of combustion. The fire-protection mechanism may include a reflective coating to redirect infrared radiation away from the object to provide further protection. In addition, the water in the cavities may be refilled, as needed, by directing a stream of water onto the fire-protection mechanism and/or through an internal channel in the fire-protection mechanism.

公开(公告)号：US20150068776A1

公开(公告)日：2015-03-12

申请号：US13999917

申请日：2014-04-02

申请人： David C. Douglas

发明人： David C. Douglas

IPC分类号： A62C3/02

CPC分类号： A62C3/0264 ,  A62C2/06 ,  A62C2/065 ,  A62C3/0214

摘要： A fire-protection mechanism is described. The fire-protection mechanism includes multiple, overlapping cavities that can be filled with water (and, more generally, a fluid). When the fire-protection mechanism is deployed over an object, such as a building, and the cavities are filled with water, the fire-protection mechanism reduces the likelihood that the object is damaged by the heat associated with a fire proximate to the object, such as a wild fire. In particular, the heat capacity and latent heat of the water significantly increase the thermal time constant of the object, thereby reducing the likelihood of combustion. The fire-protection mechanism may include a reflective coating to redirect infrared radiation away from the object to provide further protection. In addition, the water in the cavities may be refilled, as needed, by directing a stream of water onto the fire-protection mechanism and/or through an internal channel in the fire-protection mechanism.

摘要翻译： 描述了防火机制。 防火机构包括可以充满水的多个重叠的空腔（更通常为流体）。 当防火机构部署在诸如建筑物的物体上并且空腔充满水时，防火机构降低了由与靠近物体的火相关的热量的物体损坏的可能性， 如野火。 特别地，水的热容量和潜热显着地增加了物体的热时间常数，从而降低了燃烧的可能性。 火灾保护机构可以包括反射涂层以将红外辐射重新定向远离物体以提供进一步的保护。 此外，根据需要，空腔中的水可以通过将水流引导到防火机构和/或通过防火机构中的内部通道来重新填充。

公开(公告)号：US06219775B1

公开(公告)日：2001-04-17

申请号：US09040747

申请日：1998-03-18

申请人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

发明人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

IPC分类号： G06F702

CPC分类号： G06F15/8092 ,  G06F15/17381 ,  G06F15/8084 ,  G06F21/52

摘要： A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.

摘要翻译： 大型并行计算机包括多个处理节点和由网络互连的至少一个控制节点。 该网络便于处理节点之间的数据传输和从控制节点到处理节点的命令。 每个处理节点包括用于在网络上传输数据并从其接收数据和命令的接口，用于存储数据的至少一个存储器模块，节点处理器和辅助处理器。 节点处理器在产生存储器访问请求的过程中接收由接口接收的命令并响应于此处理数据，以便于从存储器模块中的数据检索或存储数据。 节点处理器进一步通过接口控制网络上的数据传输。 辅助处理器连接到存储器模块和节点处理器。 响应于来自节点处理器的存储器访问请求，辅助处理器执行存储器访问操作以将从节点处理器接收的数据存储在存储器模块中，或者从存储器模块检索数据以传送到节点处理器。 响应于来自节点处理器的辅助处理指令，辅助处理器结合存储器模块中的数据执行数据处理操作。

公开(公告)号：US5872987A

公开(公告)日：1999-02-16

申请号：US714635

申请日：1996-09-16

申请人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

发明人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

IPC分类号： G06F15/173 ,  G06F15/78 ,  G06F15/80 ,  G06F7/02

CPC分类号： G06F15/8092 ,  G06F15/17381 ,  G06F15/8084 ,  G06F21/52

摘要： A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.

摘要翻译： 大型并行计算机包括多个处理节点和由网络互连的至少一个控制节点。 该网络便于处理节点之间的数据传输和从控制节点到处理节点的命令。 每个处理节点包括用于从网络传输数据并从其接收数据和命令的接口，用于存储数据的至少一个存储器模块，节点处理器和辅助处理器。 节点处理器在产生存储器访问请求的过程中接收由接口接收的命令并响应于此处理数据，以便于从存储器模块中的数据检索或存储数据。 节点处理器进一步通过接口控制网络上的数据传输。 辅助处理器连接到存储器模块和节点处理器。 响应于来自节点处理器的存储器访问请求，辅助处理器执行存储器访问操作以将从节点处理器接收的数据存储在存储器模块中，或者从存储器模块检索数据以传送到节点处理器。 响应于来自节点处理器的辅助处理指令，辅助处理器结合存储器模块中的数据执行数据处理操作。

公开(公告)号：US20120211878A1

公开(公告)日：2012-08-23

申请号：US13029825

申请日：2011-02-17

申请人： Darko R. Popovic ,  Matthew D. Giere ,  Bruce M. Guenin ,  Theresa Y. Sze ,  Ivan Shubin ,  John A. Harada ,  David C. Douglas ,  Jing Shi

发明人： Darko R. Popovic ,  Matthew D. Giere ,  Bruce M. Guenin ,  Theresa Y. Sze ,  Ivan Shubin ,  John A. Harada ,  David C. Douglas ,  Jing Shi

IPC分类号： H01L25/07 ,  H01L21/60

CPC分类号： H01L24/05 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/0554 ,  H01L2224/05554 ,  H01L2224/1134 ,  H01L2224/13005 ,  H01L2224/13011 ,  H01L2224/1302 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1329 ,  H01L2224/13311 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14151 ,  H01L2224/14155 ,  H01L2224/14515 ,  H01L2224/16105 ,  H01L2224/16157 ,  H01L2224/17181 ,  H01L2224/20 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/4813 ,  H01L2224/48159 ,  H01L2224/484 ,  H01L2224/4846 ,  H01L2224/48463 ,  H01L2224/48477 ,  H01L2224/50 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/75704 ,  H01L2224/81139 ,  H01L2224/81947 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/00012

摘要： In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a ‘plank stack’) are separated by a mechanical spacer (such as a filler material or an adhesive). Moreover, the chip package includes a substrate at a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the substrate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as: solder, stud bumps, plated traces, wire bonds, spring connectors, a conductive adhesive and/or an anisotropic conducting film. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the substrate.

摘要翻译： 在芯片封装中，半导体管芯或芯片（被称为“板堆叠”）的垂直堆叠中的半导体管芯由机械间隔件（例如填充材料或粘合剂）分开。 此外，芯片封装包括与板堆叠成直角的衬底，其与板堆叠的边缘电耦合到半导体管芯。 特别地，靠近基板表面（沿着板堆叠的堆叠方向）的电焊盘通过中间导电材料电耦合到靠近半导体管芯边缘的焊盘，例如：焊料，螺柱 凸块，电镀痕迹，线接合，弹簧连接器，导电粘合剂和/或各向异性导电膜。 注意，芯片封装可以促进半导体管芯和衬底之间的信号的高带宽通信。

公开(公告)号：US20120056327A1

公开(公告)日：2012-03-08

申请号：US12874446

申请日：2010-09-02

申请人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

发明人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC分类号： H01L23/52

CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L23/544 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L29/0657 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16105 ,  H01L2224/16135 ,  H01L2224/16151 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/81141 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/819 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2225/06531 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1015 ,  H01L2924/10155 ,  H01L2924/151

摘要： A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, is electrically and mechanically coupled to the exposed pads. For example, the ramp component may be coupled to the semiconductor dies using: solder, microsprings and/or an anisotropic conducting film. Furthermore, each of the semiconductor dies includes a static bend so that an end segment of each of the semiconductor dies is parallel to the direction and is mechanically coupled to the ramp component. These end segments may facilitate high-bandwidth communication of signals between the chips and the ramp component, for example, via proximity communication.

摘要翻译： 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定具有暴露焊盘的露台。 位于大致平行于平台的高带宽斜坡部件被电气和机械耦合到暴露的焊盘。 例如，斜坡部件可以使用：焊料，微弹簧和/或各向异性导电膜耦合到半导体管芯。 此外，每个半导体管芯包括静态弯曲部，使得每个半导体管芯的端部段平行于该方向，并机械耦合到斜坡部件。 这些端段可以促进芯片和斜坡部件之间的信号的高带宽通信，例如通过接近通信。

公开(公告)号：US20120051695A1

公开(公告)日：2012-03-01

申请号：US12868577

申请日：2010-08-25

申请人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

发明人： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC分类号： G02B6/26

CPC分类号： H01L25/0657 ,  G02B6/43 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0652 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/6627 ,  H01L2224/131 ,  H01L2224/14155 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2924/1903 ,  H01L2924/19104 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/014

摘要： A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a stepped terrace. A high-bandwidth ramp component, which is positioned approximately parallel to the stepped terrace, is mechanically coupled to the semiconductor dies. Furthermore, the ramp component includes an optical waveguide that conveys the optical signal, and an optical coupling component that optically couples the optical signal to one of the semiconductor dies, thereby facilitating high-bandwidth communication of the optical signal between the semiconductor die and the ramp component.

摘要翻译： 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向上彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定阶梯式台阶。 位于大致平行于阶梯式台阶的高带宽斜坡部件机械耦合到半导体管芯。 此外，斜坡部件包括传送光信号的光波导和光耦合部件，其将光信号光耦合到半导体管芯之一，从而有助于半导体管芯和斜坡之间的光信号的高带宽通信 零件。

公开(公告)号：US06449667B1

公开(公告)日：2002-09-10

申请号：US09354425

申请日：1999-07-16

申请人： Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  Monica C. Wong-Chan ,  David C. Douglas

发明人： Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  Monica C. Wong-Chan ,  David C. Douglas

IPC分类号： G06F1300

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  G06F2201/88 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555

摘要： A digital computer comprising a plurality of processors interconnected by a network for transferring messages among the processors. At least one processor generates messages of a configuration type. The network comprises a plurality of nodes interconnected in a tree pattern in a series of levels from a lower leaf level to an upper physical root level, with the leaf nodes connected to the processors. Each of the nodes includes a root flag that can be set or cleared in response to a message of the configuration type to establish the node as a logical root. For each node, if the node is a logical root it transfers messages received from a node at a lower level in the tree back down the tree, but if the node is not a logical root it transfers messages received at a lower level node to a higher level node.

摘要翻译： 一种数字计算机，包括由网络互连以在处理器之间传送消息的多个处理器。 至少一个处理器生成配置类型的消息。 该网络包括多个节点，其以树形图案从下叶级别到上层物理根级别的一系列级别互连，叶节点连接到处理器。 每个节点包括可以响应于配置类型的消息来建立该节点作为逻辑根而设置或清除的根标志。 对于每个节点，如果节点是逻辑根，则将从树中的较低级别的节点接收的消息从树中向下传播，但是如果节点不是逻辑根，则将在较低级节点处接收的消息传送到 高级节点。

公开(公告)号：US5530809A

公开(公告)日：1996-06-25

申请号：US181711

申请日：1994-01-14

申请人： David C. Douglas ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Shaw-Wen Yang ,  W. Daniel Hillis ,  David Wells ,  Carl R. Feynman ,  Bruce J. Walker ,  Brewster Kahle

发明人： David C. Douglas ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Shaw-Wen Yang ,  W. Daniel Hillis ,  David Wells ,  Carl R. Feynman ,  Bruce J. Walker ,  Brewster Kahle

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F15/163

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer comprising a plurality of message generating nodes interconnected by a routing network. The routing network transfers messages among the message generating elements in accordance with address information identifying a destination message generating element. Each message generating node includes a message data generator and a network interface. The message data generator generates message data items each including an address data portion comprising a destination identifier. The network interface includes a message generator and an address translation table, the table including a plurality of entries identifying, for at least one destination identifier, a translated destination identifier. The message generator, in response to the receipt of a message data item from the message data generator, generates a message for transmission to the routing network. In generating the message, the message generator performs an address translation operation in connection with the address data and the contents of the address translation table to generate updated address data which it uses data in connection with generating address information for the message.

摘要翻译： 一种数字计算机，包括由路由网络互连的多个消息生成节点。 路由网络根据识别目的地消息生成元素的地址信息在消息生成元件之间传送消息。 每个消息生成节点包括消息数据生成器和网络接口。 消息数据生成器生成包括包括目的地标识符的地址数据部分的消息数据项。 网络接口包括消息发生器和地址转换表，该表包括多个条目，用于为至少一个目的地标识符标识已翻译的目的地标识符。 消息生成器响应于从消息数据生成器接收到消息数据项，生成用于传输到路由网络的消息。 在生成消息时，消息生成器执行与地址数据和地址转换表的内容相关的地址转换操作，以生成更新的地址数据，其使用与为消息生成地址信息相结合的数据。

公开(公告)号：US5353412A

公开(公告)日：1994-10-04

申请号：US746035

申请日：1991-08-16

申请人： David C. Douglas ,  John J. Earls ,  W. Daniel Hillis ,  Mahesh N. Ganmukhi

发明人： David C. Douglas ,  John J. Earls ,  W. Daniel Hillis ,  Mahesh N. Ganmukhi

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F13/00

CPC分类号： G06F11/08 ,  G06F11/22 ,  G06F15/17343 ,  G06F15/17381 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer having a plurality of message generating elements each generating and receiving messages and a network for transferring messages among the message generating elements. The network includes a plurality of node clusters interconnected in a tree pattern from a lower leaf level to an upper root level, each node cluster including at least one node group with node clusters in a level above at least one predetermined level having a larger number of node groups than node clusters of the predetermined level for transferring messages among the message generating elements. Each node group in the node clusters of the predetermined level include a selective message coupling circuit for selectively coupling messages between the node group and a selected one of the upper-level node groups, the message coupling circuits of the node groups being separately controlled by a partition control circuit so as to facilitate partitioning of the network into a plurality of partitions so that messages generated by the lower-level node groups for transfer to each of at least one selected group of message generating elements are in response to messages generated thereby.

摘要翻译： 一种具有多个消息产生元件的数字计算机，每个消息生成元件生成和接收消息，以及用于在消息产生元件之间传送消息的网络。 网络包括以从下叶级别到上级根级别的树形图案互连的多个节点群集，每个节点群集包括至少一个具有节点簇的节点群，所述节点群在高于至少一个具有较大数目的 节点组比用于在消息生成元素之间传送消息的预定级别的节点集群。 预定级别的节点簇中的每个节点组包括选择性消息耦合电路，用于选择性地耦合节点组与所选择的上级节点组之间的消息，节点组的消息耦合电路被单独控制 分区控制电路，以便于将网络划分成多个分区，使得由下级节点组生成的用于传送到至少一个所选择的消息生成元素组中的每一个的消息都响应于由此产生的消息。