利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

202 条记录 (耗时 0.027 秒)

    Planarizing by polishing techniques for fabricating semiconductor devices based on CMOS structures
    11.
    发明授权
    Planarizing by polishing techniques for fabricating semiconductor devices based on CMOS structures 失效
    通过基于CMOS结构制造半导体器件的抛光技术进行平面化

    公开(公告)号：US5554555A

    公开(公告)日：1996-09-10

    申请号：US353897

    申请日：1994-12-12

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch

    IPC分类号： H01L21/266 ,  H01L21/3105 ,  H01L21/8238 ,  H01L21/00

    CPC分类号： H01L21/31051 ,  H01L21/266 ,  H01L21/3105 ,  H01L21/31053 ,  H01L21/823871 ,  Y10S438/981

    摘要： Methods of planarizing one or more layers having an irregular top surface topology in a semiconductor device based on an underlying MOS structure are disclosed. Methods of creating doped wells or regions for the underlying MOS structure are also disclosed, using thick oxide growths on the surface of the substrate to mask implantation of ions into, the wells. A technique for creating a pair of adjacent complementary oppositely-doped wells, such as for a CMOS structure, using a thick oxide growths as a mask is also disclosed. One of the methods of planarizing the one or more layers involves depositing, densifying and re-flowing a layer of glass on top of the topological layer. Another method of planarizing the one or more layers involves depositing, densifying and chemical-mechanically polishing the deposited and densified glass, thereby avoiding an additional temperature cycle (i.e., for re-flowing the glass) which would adversely affect underlying diffusions.

    摘要翻译： 公开了基于下面的MOS结构在半导体器件中平面化具有不规则顶表面拓扑的一个或多个层的方法。 还公开了为底层MOS结构产生掺杂阱或区域的方法，其中在衬底的表面上使用厚的氧化物生长来掩蔽离子注入到阱中。 还公开了一种用于产生一对相邻的互补相对掺杂阱的技术，例如使用厚氧化物生长作为掩模的CMOS结构。 对一个或多个层进行平坦化的方法之一包括在拓扑层顶部沉积，致密化和再流动玻璃层。 平面化一个或多个层的另一种方法包括沉积，致密化和化学机械抛光沉积的和致密化的玻璃，从而避免对底层扩散产生不利影响的附加温度循环（即，用于重新流动玻璃）。

    Clean laser cutting of metal lines on microelectronic circuit substrates using reactive gases
    12.
    发明授权
    Clean laser cutting of metal lines on microelectronic circuit substrates using reactive gases 失效
    使用反应气体清洁激光切割微电子电路基板上的金属线

    公开(公告)号：US5539174A

    公开(公告)日：1996-07-23

    申请号：US249398

    申请日：1994-05-26

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch

    IPC分类号： H01L21/768 ,  H05K3/02 ,  B23K26/16

    CPC分类号： H01L21/76894 ,  H05K3/027 ,  Y10T29/49156

    摘要： A laser is used to cut or "zap" unwanted sections of an aluminum interconnect metallization pattern on a microelectronic circuit substrate. Vaporized aluminum forms a cloud above the substrate that is reacted with a gas to form a substance which can be prevented from solidifying and forming a conductive residue on the substrate that could create a short circuit in the metallization pattern. The gas can be pressurized oxygen, in which case the reactant substance is electrically insulative aluminum oxide that forms a desirable sealing coating over the cut area. The aluminum oxide has a lower density than aluminum, and expands in the cut area to form a hermetic seal with the facing edges of the metallization pattern. Alternatively, the gas can be chlorine or other material which forms a residue that can be easily removed using a solvent such as water.

    摘要翻译： 激光用于在微电子电路基板上切割或“切割”铝互连金属化图案的不想要的部分。 蒸发的铝在基板上形成与气体反应的云，以形成可以防止在基板上固化和形成可能在金属化图案中短路的导电残留物的物质。 气体可以是加压氧气，在这种情况下，反应物质是电绝缘氧化铝，在切割区域上形成期望的密封涂层。 氧化铝具有比铝低的密度，并且在切割区域中膨胀以与金属化图案的相对边缘形成气密密封。 或者，气体可以是氯或其它形成残留物的材料，其可以使用诸如水的溶剂容易地除去。

    High speed shuttle for gating a radiation beam, particularly for semiconductor lithography apparatus
    14.
    发明授权
    High speed shuttle for gating a radiation beam, particularly for semiconductor lithography apparatus 失效
    用于选通辐射束的高速快门，特别是用于半导体光刻设备

    公开(公告)号：US5374974A

    公开(公告)日：1994-12-20

    申请号：US56239

    申请日：1993-04-30

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch ,  Joe Zelayeta

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch ,  Joe Zelayeta

    IPC分类号： G02B17/00 ,  G02B26/02 ,  G02B27/09 ,  G02F1/19 ,  G02F1/33 ,  G03F7/20 ,  G21K1/04 ,  G03B27/72 ,  G02F1/00

    CPC分类号： G02B27/0994 ,  G02B17/00 ,  G02B26/02 ,  G02F1/19 ,  G03F7/70008 ,  G03F7/702 ,  G03F7/70375 ,  G21K1/04 ,  G02F1/33 ,  Y10S430/107 ,  Y10S430/108

    摘要： Fine, sub-micron line features and patterns are created in a sensitized layer on a semiconductor wafer by a beam of low wavelength radiation, such as X-rays or Gamma-rays. A continuous stream of such radiation is gated on and off by a shutter mechanism comprising a distortable-surface device and a beam-blocking device. The distortable-surface device is a surface acoustic wave device, a magnetostrictive device, or the like. The beam-blocking device is a beam stop, such as a knife edge, an aperture, or the like. The distortable-surface device can be selectively caused to reflect an incident beam of radiation past or into the beam-blocking device. In this manner, a continuous stream of radiation, such as from a pellet of Cobalt-60, can be quickly and precisely gated on and off to impact and to not-impact the semiconductor wafer, respectively. By moving either of the reflected beam or the semiconductor wafer, line features can be created in the sensitized layer on the semiconductor wafer.

    摘要翻译： 通过诸如X射线或γ射线的低波长辐射束在半导体晶片上的敏化层中产生细微亚微米线特征和图案。 这种辐射的连续流由包括可变形表面装置和束阻挡装置的快门机构开启和关闭。 可变形表面装置是表面声波装置，磁致伸缩装置等。 光束阻挡装置是光束挡块，例如刀刃，孔等。 可变形表面装置可以选择性地反射入射束阻挡装置的入射入射光束。 以这种方式，连续的辐射流，例如来自Cobalt-60的颗粒，可以快速且精确地选通开启和关闭以冲击并且不影响半导体晶片。 通过移动反射光束或半导体晶片中的任何一个，可以在半导体晶片上的增感层中产生线特征。

    Automating photolithography in the fabrication of integrated circuits
    15.
    发明授权
    Automating photolithography in the fabrication of integrated circuits 失效
    在制造集成电路时自动化光刻

    公开(公告)号：US06418353B1

    公开(公告)日：2002-07-09

    申请号：US09064802

    申请日：1998-04-22

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch ,  Ashok K. Kapoor

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch ,  Ashok K. Kapoor

    IPC分类号： G06F1900

    CPC分类号： G03F7/705 ,  G03F7/70433 ,  G03F7/70625

    摘要： Automated photolithography of integrated circuit wafers is enabled with a processor connected to a Rayleigh derator, a form factor generator, a logic synthesizer, a layout generator, a lithography module and a wafer process. The Rayleigh derator receives manufacturing information resulting from yield data in the wafer process, and this manufacturing data is then used to derate the theoretical minimum feature size available for etching wafer masks given a known light source and object lens numerical aperture. This minimum feature size is then used by a form factor generator in sizing transistors in a net list to their smallest manufacturable size. A logic synthesizer then converts the net list into a physical design using a layout generator combined with user defined constraints. This physical design is then used by the mask lithography module to generate wafer masks for use in the semiconductor manufacturing. Manufacturing data including process and. yield parameters is then transferred back to the Rayleigh processor for use in the designing of subsequent circuits. In this way, a direct coupling exists between the measurement of wafer process parameters and the automated sizing of semiconductor devices, enabling the production of circuits having the smallest manufacturable device sizes available for the given lithography and wafer process.

    摘要翻译： 集成电路晶片的自动光刻可通过连接到瑞利分离器，形状因子发生器，逻辑合成器，布局发生器，光刻模块和晶片工艺的处理器来实现。 Rayleigh变矩器接收由晶片工艺中的屈服数据产生的制造信息，然后使用该制造数据降低可用于蚀刻具有已知光源和物镜数值孔径的晶片掩模的理论最小特征尺寸。 然后，这种最小特征尺寸由形状因子发生器用于将网络列表中的晶体管调整到其最小可制造尺寸。 然后，逻辑合成器将网络列表转换为使用布局生成器与用户定义的约束组合的物理设计。 然后该掩模光刻模块将该物理设计用于半导体制造中使用的晶片掩模。 制造数据包括流程和。 然后将产量参数转移回瑞利处理器用于后续电路的设计。 以这种方式，在晶片工艺参数的测量和半导体器件的自动化尺寸之间存在直接耦合，使得能够生产具有可用于给定光刻和晶片工艺的最小可制造器件尺寸的电路。

    Fabricating a semiconductor device using precursor CMOS semiconductor substrate of a given configuration
    16.
    发明授权
    Fabricating a semiconductor device using precursor CMOS semiconductor substrate of a given configuration 失效
    使用给定配置的前驱CMOS半导体衬底制造半导体器件

    公开(公告)号：US5874327A

    公开(公告)日：1999-02-23

    申请号：US711283

    申请日：1996-09-09

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch

    IPC分类号： H01L21/266 ,  H01L21/3105 ,  H01L21/8238

    CPC分类号： H01L21/31051 ,  H01L21/266 ,  H01L21/3105 ,  H01L21/31053 ,  H01L21/823871 ,  Y10S438/981

    摘要： Methods of planarizing one or more layers having an irregular top surface topology in a semiconductor device based on an underlying MOS structure are disclosed. Methods of creating doped wells or regions for the underlying MOS structure are also disclosed, using thick oxide growths on the surface of the substrate to mask implantation of ions into the wells. A technique for creating a pair of adjacent complementary oppositely-doped wells, such as for a CMOS structure, using a thick oxide growths as a mask is also disclosed. One of the methods of planarizing the one or more layers involves depositing, densifying and re-flowing a layer of glass on top of the topological layer. Another method of planarizing the one or more layers involves depositing, densifying and chemical-mechanically polishing the deposited and densified glass, thereby avoiding an additional temperature cycle (i.e., for re-flowing the glass) which would adversely affect underlying diffusions.

    摘要翻译： 公开了基于下面的MOS结构在半导体器件中平面化具有不规则顶表面拓扑的一个或多个层的方法。 还公开了为底层MOS结构产生掺杂阱或区域的方法，其使用在衬底表面上的厚氧化物生长来掩蔽将离子注入到阱中。 还公开了一种用于产生一对相邻的互补相对掺杂阱的技术，例如使用厚氧化物生长作为掩模的CMOS结构。 对一个或多个层进行平坦化的方法之一包括在拓扑层顶部沉积，致密化和再流动玻璃层。 平面化一个或多个层的另一种方法包括沉积，致密化和化学机械抛光沉积的和致密化的玻璃，从而避免对底层扩散产生不利影响的附加温度循环（即，用于重新流动玻璃）。

    Method of forming a semiconductor device having CMOS structures on a semiconductor substrate
    18.
    发明授权
    Method of forming a semiconductor device having CMOS structures on a semiconductor substrate 失效
    在半导体衬底上形成具有CMOS结构的半导体器件的方法

    公开(公告)号：US5663086A

    公开(公告)日：1997-09-02

    申请号：US571345

    申请日：1995-12-12

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch

    IPC分类号： H01L21/266 ,  H01L21/3105 ,  H01L21/8238 ,  H01L21/70 ,  H01L27/00

    CPC分类号： H01L21/31051 ,  H01L21/266 ,  H01L21/3105 ,  H01L21/31053 ,  H01L21/823871 ,  Y10S438/981

    摘要： Methods of planarizing one or more layers having an irregular top surface topology in a semiconductor device based on an underlying MOS structure are disclosed. Methods of creating doped wells or regions for the underlying MOS structure are also disclosed, using thick oxide growths on the surface of the substrate to mask implantation of ions into the wells. A technique for creating a pair of adjacent complementary oppositely-doped wells, such as for a CMOS structure, using a thick oxide growths as a mask is also disclosed. One of the methods of planarizing the one or more layers involves depositing, densifying and re-flowing a layer of glass on top of the topological layer. Another method of planarizing the one or more layers involves depositing, densifying and chemical-mechanically polishing the deposited and densified glass, thereby avoiding an additional temperature cycle (i.e., for re-flowing the glass) which would adversely affect underlying diffusions.

    摘要翻译： 公开了基于下面的MOS结构在半导体器件中平面化具有不规则顶表面拓扑的一个或多个层的方法。 还公开了为底层MOS结构产生掺杂阱或区域的方法，其使用在衬底表面上的厚氧化物生长来掩蔽将离子注入到阱中。 还公开了一种用于产生一对相邻的互补相对掺杂阱的技术，例如使用厚氧化物生长作为掩模的CMOS结构。 对一个或多个层进行平坦化的方法之一包括在拓扑层顶部沉积，致密化和再流动玻璃层。 平面化一个或多个层的另一种方法包括沉积，致密化和化学机械抛光沉积的和致密化的玻璃，从而避免对底层扩散产生不利影响的附加温度循环（即，用于重新流动玻璃）。

    Image mask substrate for X-ray semiconductor lithography
    19.
    发明授权
    Image mask substrate for X-ray semiconductor lithography 失效
    用于X射线半导体光刻的图像掩模基板

    公开(公告)号：US5572562A

    公开(公告)日：1996-11-05

    申请号：US328555

    申请日：1994-10-25

    申请人： Michael D. Rostoker ,  Nicholas F. Pasch ,  Joe Zelayeta

    发明人： Michael D. Rostoker ,  Nicholas F. Pasch ,  Joe Zelayeta

    IPC分类号： G03F1/22 ,  G03F7/20 ,  G21K1/10 ,  G21K5/00

    CPC分类号： G03F1/22 ,  G03F7/7035 ,  G03F7/70375 ,  G03F7/70808 ,  G21K1/10

    摘要： Fine, sub-micron line features and patterns are created in a sensitized layer on a semiconductor wafer by a source of X-ray radiation. The X-ray source emits very low wavelength radiation along a path towards a sensitized surface of a semiconductor wafer. An image mask substrate is disposed in the path of the radiation, and is provided with a patterned opaque material on a surface of a substrate thereof. The substrate is formed of beryllium, which is robust and has a thermal coefficient of expansion closely conforming to that of common image mask carriers. Further, a wide variety of opaqueing materials adhere well to the beryllium substrate, and the substrate is relatively insensitive to moisture. The image mask is spaced sufficiently close to the wafer that radiation passing through the mask forms a corresponding pattern in the surface of the wafer. For X-ray radiation, the opaqueing material is gold, tungsten, platinum, barium, lead, iridium, rhodium, or the like.

    摘要翻译： 通过X射线辐射源在半导体晶片上的增感层中产生精细的亚微米线特征和图案。 X射线源沿着朝向半导体晶片的敏化表面的路径发射非常低的波长辐射。 图像掩模基板设置在辐射的路径中，并且在其基板的表面上设置有图案化的不透明材料。 基板由铍形成，其坚固且具有与普通图像掩模载体的热膨胀系数相近的热膨胀系数。 此外，各种不透明材料很好地粘附到铍基底上，并且基底对湿气相对不敏感。 图像掩模与晶片充分地间隔开，通过掩模的辐射在晶片表面形成相应的图案。 对于X射线辐射，不透明材料是金，钨，铂，钡，铅，铱，铑等。