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    COMPONENT HAVING A MULTIPLE QUANTUM WELL STRUCTURE
    13.
    发明申请
    COMPONENT HAVING A MULTIPLE QUANTUM WELL STRUCTURE 审中-公开

    公开(公告)号：US20180083160A1

    公开(公告)日：2018-03-22

    申请号：US15559409

    申请日：2016-03-01

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Tobias MEYER ,  Thomas LEHNHARDT ,  Matthias PETER ,  Asako HIRAI ,  Juergen OFF ,  Philipp DRECHSEL ,  Peter STAUSS

    IPC: H01L33/06 ,  H01S5/22 ,  H01S5/30 ,  H01S5/34 ,  H01S5/32

    CPC classification number: H01L33/06 ,  H01L33/32 ,  H01S5/2228 ,  H01S5/309 ,  H01S5/3216 ,  H01S5/34

    Abstract: The invention relates to a component (10) having a semiconductor layer sequence, which has a p-conducting semiconductor layer (1), an n-conducting semiconductor layer (2), and an active zone (3) arranged between the p-conducting semiconductor layer and the n-conducting semiconductor layer, wherein the active zone has a multiple quantum well structure, which, from the p-conducting semiconductor layer to the n-conducting semiconductor layer, has a plurality of p-side barrier layers (32p) having intermediate quantum well layers (31) and a plurality of n-side barrier layers (32n) having intermediate quantum layers (31). Recesses (4) having flanks are formed in the semiconductor layer sequence on the part of the p-conducting semiconductor layer, wherein the quantum well layers and/or the n- and p-side barrier layers extend in a manner conforming to the flanks of the recesses at least in regions. The interior barrier layers have a larger average layer thickness than the p-side barrier layers.

    METHOD FOR PRODUCING A LAYER STRUCTURE AS A BUFFER LAYER OF A SEMICONDUCTOR COMPONENT AND LAYER STRUCTURE AS A BUFFER LAYER OF A SEMICONDUCTOR COMPONENT
    14.
    发明申请
    METHOD FOR PRODUCING A LAYER STRUCTURE AS A BUFFER LAYER OF A SEMICONDUCTOR COMPONENT AND LAYER STRUCTURE AS A BUFFER LAYER OF A SEMICONDUCTOR COMPONENT 审中-公开
    作为半导体元件的缓冲层的层结构的制造方法和作为半导体元件的缓冲层的层结构的方法

    公开(公告)号：US20170040165A1

    公开(公告)日：2017-02-09

    申请号：US15304488

    申请日：2015-04-13

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Philipp DRECHSEL ,  Werner BERGBAUER ,  Juergen OFF ,  Peter STAUSS

    IPC: H01L21/02 ,  H01L33/12 ,  H01L33/32 ,  H01L33/00

    CPC classification number: H01L21/02458 ,  H01L21/02107 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02647 ,  H01L33/007 ,  H01L33/12 ,  H01L33/32

    Abstract: What is specified is a method for producing a layer structure (10) as a buffer layer of a semiconductor component, said method comprising the following steps: a) provision of a carrier (1), which has a silicon surface (1a), b) deposition of a first layer sequence (2), which comprises a seeding layer (21) containing aluminium and nitrogen, on the silicon surface (1a) of the carrier (1) along a stacking direction (H) running perpendicular to a main plane of extent of the carrier (1), c) three-dimensional growth of a 3D-GaN layer (3), which is formed with gallium nitride, on a top surface (2a) of the first layer sequence (2) which is remote from the silicon surface (1a), d) two-dimensional growth of a 2D-GaN layer (4), which is formed with gallium nitride, on the outer surfaces (3a) of the 3D-GaN layer (3) which are remote from the silicon surface (1a).

    Abstract translation: 具体实施方式是制造作为半导体部件的缓冲层的层结构（10）的方法，所述方法包括以下步骤：a）设置具有硅表面（1a）的载体（1），b ）沿着垂直于主平面的堆叠方向（H）在载体（1）的硅表面（1a）上沉积包括含有铝和氮的接种层（21）的第一层序列（2） 载体（1）的程度，c）在第一层序列（2）的顶部表面（2a）上三维生长的氮化镓形成的三维GaN层（3），其是远程的 从硅表面（1a）中，d）在三维GaN层（3）的外表面（3a）上的二氮化镓形成的2D-GaN层（4）的二维生长是远程的 从硅表面（1a）。

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