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127 条记录 (耗时 0.033 秒)

    COMPLEX OXIDE NANODOTS
    12.
    发明申请
    COMPLEX OXIDE NANODOTS 有权
    复合氧化物纳米

    公开(公告)号：US20090045447A1

    公开(公告)日：2009-02-19

    申请号：US11840485

    申请日：2007-08-17

    申请人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

    发明人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

    IPC分类号： H01L29/78 ,  H01L21/316 ,  H01L21/28

    CPC分类号： H01L21/31691 ,  H01L21/28273 ,  H01L21/3142 ,  H01L29/42332 ,  H01L29/7881

    摘要： Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated pulses of a titanium source material, a strontium source material, and an oxygen source material capable of forming an oxide with the titanium source material and the strontium source material to form the charge trapping layer on the substrate.

    摘要翻译： 公开了方法和装置，例如涉及为例如可以包括闪速存储器单元的存储器件形成电荷阱的那些。 将衬底暴露于钛源材料，锶源材料和能够与钛源材料和锶源材料形成氧化物的氧源材料的时间分离的脉冲，以在衬底上形成电荷捕获层。

    Methods of forming a non-volatile resistive oxide memory array
    14.
    发明授权
    Methods of forming a non-volatile resistive oxide memory array 有权
    形成非易失性电阻氧化物存储器阵列的方法

    公开(公告)号：US08637113B2

    公开(公告)日：2014-01-28

    申请号：US13354163

    申请日：2012-01-19

    申请人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

    发明人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

    IPC分类号： C23C18/00 ,  C23C20/00 ,  C23C28/00 ,  C23C30/00 ,  H01C17/06

    CPC分类号： H01L27/101 ,  H01L21/0271 ,  Y10S438/947

    摘要： A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

    摘要翻译： 形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。 含金属氧化物的材料形成在多条所述一条字线或位线中。 在多个所述一条字线或位线之间提供一系列细长的沟槽。 多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。 从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。

    Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays
    16.
    发明授权
    Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays 有权
    非易失性电阻氧化物存储单元，非易失性电阻氧化物存储器阵列以及形成非易失性电阻氧化物存储器单元和存储器阵列的方法

    公开(公告)号：US08034655B2

    公开(公告)日：2011-10-11

    申请号：US12099267

    申请日：2008-04-08

    申请人： John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

    发明人： John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

    IPC分类号： H01L21/8239

    CPC分类号： H01L45/04 ,  G11C11/56 ,  G11C13/00 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1666

    摘要： A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.

    摘要翻译： 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 绝缘材料沉积在第一电极上。 在第一电极上形成绝缘材料的开口。 开口包括侧壁和底座。 开口侧壁和基底衬有包含少于填充开口的多电阻态金属氧化物材料的多电阻状态层。 存储单元的第二导电电极形成在多个电阻状态层的横向内侧的开口的内部，该电阻层衬在侧壁上，并且在衬底基底上的多电阻状态层的顶部形成。 考虑了其他方面和实现。

    Methods Of Forming A Non-Volatile Resistive Oxide Memory Cell And Methods Of Forming A Non-Volatile Resistive Oxide Memory Array
    18.
    发明申请
    Methods Of Forming A Non-Volatile Resistive Oxide Memory Cell And Methods Of Forming A Non-Volatile Resistive Oxide Memory Array 有权
    形成非易失性电阻氧化物记忆单元的方法和形成非易失性电阻氧化物存储器阵列的方法

    公开(公告)号：US20100003782A1

    公开(公告)日：2010-01-07

    申请号：US12166604

    申请日：2008-07-02

    申请人： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  Neil Greeley ,  Kunal Parekh

    发明人： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  Neil Greeley ,  Kunal Parekh

    IPC分类号： H01L21/16

    CPC分类号： H01L45/1683 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16

    摘要： A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Metal oxide-comprising material is formed over the first conductive electrode. Etch stop material is deposited over the metal oxide-comprising material. Conductive material is deposited over the etch stop material. A second conductive electrode of the memory cell which comprises the conductive material received is formed over the etch stop material. Such includes etching through the conductive material to stop relative to the etch stop material and forming the non-volatile resistive oxide memory cell to comprise the first and second conductive electrodes having both the metal oxide-comprising material and the etch stop material therebetween. Other implementations are contemplated.

    摘要翻译： 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 含金属氧化物的材料形成在第一导电电极上。 蚀刻停止材料沉积在包含金属氧化物的材料上。 导电材料沉积在蚀刻停止材料上。 包含所接收的导电材料的存储单元的第二导电电极形成在蚀刻停止材料上。 这样包括通过导电材料蚀刻以相对于蚀刻停止材料停止并且形成非易失性电阻氧化物存储单元，以包括具有包含金属氧化物的材料和其间的蚀刻停止材料的第一和第二导电电极。 考虑其他实现。

    Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array
    19.
    发明授权
    Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array 有权
    形成非易失性电阻氧化物存储单元的方法和形成非易失性电阻氧化物存储器阵列的方法

    公开(公告)号：US09343665B2

    公开(公告)日：2016-05-17

    申请号：US12166604

    申请日：2008-07-02

    申请人： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu ,  Joseph Neil Greeley ,  Kunal R. Parekh

    发明人： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu ,  Joseph Neil Greeley ,  Kunal R. Parekh

    IPC分类号： H01L45/00 ,  H01L27/24

    CPC分类号： H01L45/1683 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16

    摘要： A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Metal oxide-comprising material is formed over the first conductive electrode. Etch stop material is deposited over the metal oxide-comprising material. Conductive material is deposited over the etch stop material. A second conductive electrode of the memory cell which comprises the conductive material received is formed over the etch stop material. Such includes etching through the conductive material to stop relative to the etch stop material and forming the non-volatile resistive oxide memory cell to comprise the first and second conductive electrodes having both the metal oxide-comprising material and the etch stop material therebetween. Other implementations are contemplated.

    摘要翻译： 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 含金属氧化物的材料形成在第一导电电极上。 蚀刻停止材料沉积在包含金属氧化物的材料上。 导电材料沉积在蚀刻停止材料上。 包含所接收的导电材料的存储单元的第二导电电极形成在蚀刻停止材料上。 这样包括通过导电材料蚀刻以相对于蚀刻停止材料停止并且形成非易失性电阻氧化物存储单元，以包括具有包含金属氧化物的材料和其间的蚀刻停止材料的第一和第二导电电极。 考虑其他实现。