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公开(公告)号:US20230081960A1
公开(公告)日:2023-03-16
申请号:US17697400
申请日:2022-03-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Eun BYUN , Sangwon KIM , Changhyun KIM , Keunwook SHIN , Changseok LEE
IPC: H01L29/78 , H01L29/08 , H01L29/417 , H01L29/10 , H01L29/423
Abstract: A vertical channel transistor includes a first source/drain electrode; a second source/drain electrode spaced apart from the first source/drain electrode in a first direction; a first channel pattern between the first source/drain electrode and the second source/drain electrode; a first gate electrode on a side surface of the first channel pattern; a first gate insulation layer between the first channel pattern and the first gate electrode; and a first graphene insertion layer between the first source/drain electrode and the first channel pattern.
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公开(公告)号:US20230041352A1
公开(公告)日:2023-02-09
申请号:US17565807
申请日:2021-12-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Seunggeol NAM , Kyung-Eun BYUN , Hyeonjin SHIN
IPC: H01L23/528 , H01L23/532
Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure may include a dielectric layer including a trench; a conductive line in the trench; and a first cap layer on an upper surface of the conductive line. The first cap layer may include a graphene-metal composite including graphene and a metal mixed with each other.
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13.
公开(公告)号:US20230022023A1
公开(公告)日:2023-01-26
申请号:US17548997
申请日:2021-12-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Changseok LEE , Sangwon KIM , Keunwook SHIN
IPC: H01L21/285 , H01L29/40
Abstract: A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.
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公开(公告)号:US20230017244A1
公开(公告)日:2023-01-19
申请号:US17552756
申请日:2021-12-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Hyeonjin SHIN , Alum JUNG , Changseok LEE
IPC: H01L21/768 , H01L23/532 , H01L21/285 , C01B32/186 , C23C16/26 , C23C16/505 , C23C16/511 , C23C16/02
Abstract: A method of forming nanocrystalline graphene according to an embodiment may include: arranging a substrate having a pattern in a reaction chamber; injecting a reaction gas into the reaction chamber, where the reaction gas includes a carbon source gas, an inert gas, and a hydrogen gas that are mixed; generating a plasma of the reaction gas in the reaction chamber; and directly growing the nanocrystalline graphene on a surface of the pattern using the plasma of the reaction gas at a process temperature. The pattern may include a first material and the substrate may include a second material different from the first material.
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公开(公告)号:US20220068633A1
公开(公告)日:2022-03-03
申请号:US17382793
申请日:2021-07-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeonjin SHIN , Keunwook SHIN
IPC: H01L21/027 , H01L21/768
Abstract: Provided are a method of forming a carbon layer and a method of forming an interconnect structure. The method of forming a carbon layer includes providing a substrate including first and second material layers, forming a surface treatment layer on at least one of the first and second material layers, and selectively forming a carbon layer on one of the first material layer and the second material layer. The carbon layer has an sp2 bonding structure.
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16.
公开(公告)号:US20180350915A1
公开(公告)日:2018-12-06
申请号:US15807096
申请日:2017-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Hyeonjin Shin , Yeonchoo Cho , Seunggeol Nam , Seongjun Park , Yunseong Lee
IPC: H01L29/16 , C01B32/186 , H01L21/02 , H01L29/167 , H01L23/532 , H01L21/3065
CPC classification number: H01L29/1606 , H01L21/02527 , H01L21/0262 , H01L21/02639 , H01L21/02645 , H01L29/66015
Abstract: A semiconductor device includes a substrate and a graphene layer. The substrate includes an insulator and a semiconductor. The graphene layer is grown on a surface of the semiconductor. The semiconductor includes at least one of a group IV material and a group III-V compound. A method of manufacturing the semiconductor device is disclosed.
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公开(公告)号:US20250159946A1
公开(公告)日:2025-05-15
申请号:US18811194
申请日:2024-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Eun BYUN , Baekwon PARK , Keunwook SHIN , Changhyun KIM , Minsu SEOL , Joungeun YOO , Hyunmi LEE
IPC: H01L29/76 , H01L21/02 , H01L21/443 , H01L29/06 , H01L29/24 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/775 , H01L29/786
Abstract: A semiconductor device may include a gate electrode, a metal nitride layer on the gate electrode, a gate insulating film on the metal nitride layer, a channel on the gate insulating film, a source electrode in one side of the channel, and a drain electrode in another side of the channel.
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公开(公告)号:US20240014287A1
公开(公告)日:2024-01-11
申请号:US18338869
申请日:2023-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eunkyu LEE , Minsu SEOL , Keunwook SHIN
CPC classification number: H01L29/513 , H01L29/7827 , H01L29/4236 , H01L29/4958 , H01L29/517 , H10B12/34 , H01L29/401
Abstract: A semiconductor device may include a substrate including a source area and a drain area separated by a trench; a gate insulating layer in the trench; and a gate electrode. The gate electrode may include a lower buried portion and an upper buried portion in the trench. The lower buried portion may include a first conductive layer, and the upper buried portion may include a two-dimensional (2D) material layer and a second conductive layer. The second conductive layer may include a transition metal. The first conductive layer may include a transition metal identical to the transition metal included in the second conductive layer. The 2D material layer may include a chalcogen compound of a transition metal which is identical to the transition metal in the second conductive layer.
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公开(公告)号:US20230343846A1
公开(公告)日:2023-10-26
申请号:US18151775
申请日:2023-01-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Eunkyu LEE , Changseok LEE , Changhyun KIM , Kyung-Eun BYUN
IPC: H01L29/45
CPC classification number: H01L29/45
Abstract: A semiconductor device may include a first semiconductor layer including a first semiconductor material; a metal layer facing the first semiconductor layer and having conductivity; a 2D material layer between the first semiconductor layer and the metal layer; and a second semiconductor layer between the first semiconductor layer and the 2D material layer. The second semiconductor layer may include a second semiconductor material different from the first semiconductor material. The second semiconductor layer and the 2D material layer may be in direct contact with each other. The second semiconductor material may include germanium.
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公开(公告)号:US20230207312A1
公开(公告)日:2023-06-29
申请号:US18179565
申请日:2023-03-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eunkyu LEE , Kyung-Eun BYUN , Hyunjae SONG , Hyeonjin SHIN , Changhyun KIM , Keunwook SHIN , Changseok LEE , Alum JUNG
IPC: H01L21/02 , H01L29/16 , H01L29/165
CPC classification number: H01L21/02447 , H01L29/1606 , H01L29/1608 , H01L29/165 , H01L21/02499 , H01L21/02527 , H01L21/0262 , H01L21/02658 , H01L21/02381
Abstract: Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.
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