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    Error correcting circuit performing error correction on user data and error correcting method using the error correcting circuit
    11.
    发明授权
    Error correcting circuit performing error correction on user data and error correcting method using the error correcting circuit 有权

    公开(公告)号：US10942805B2

    公开(公告)日：2021-03-09

    申请号：US16444056

    申请日：2019-06-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Young-Jun Hwang ,  Myung-Kyu Lee ,  Hong-Rak Son ,  Geun-Yeong Yu ,  Ki-Jun Lee

    IPC: G06F11/10 ,  G11C29/52

    Abstract: An error correcting circuit receives a codeword including user data and a parity code, and performs an error correction operation on the user data. The circuit includes a first buffer, a decoder, a second buffer and a processor. The first buffer stores the codeword and sequentially outputs pieces of subgroup data obtained by dividing the codeword. The decoder generates pieces of integrity data for each of the pieces of subgroup data received from the first buffer, and performs the error correction operation on the user data using the parity code. The second buffer sequentially stores the pieces of integrity data for each of the pieces of subgroup data. The processor determines whether an error is present in the codeword based on the pieces of integrity data stored in the second buffer when at least one of the pieces of integrity data is updated in the second buffer.

    Memory Device, Memory System, and Operating Method of Memory System
    15.
    发明申请
    Memory Device, Memory System, and Operating Method of Memory System 有权
    存储器件，存储器系统和存储器系统的操作方法

    公开(公告)号：US20150363335A1

    公开(公告)日：2015-12-17

    申请号：US14626989

    申请日：2015-02-20

    Applicant: SAMSUNG ELECTRONICS CO.,LTD.

    Inventor： Seong-Hyeog Choi ,  Jun-Jin Kong ,  Hong-Rak Son ,  Pil-Sang Yoon ,  Chang-Kyu Seol

    IPC: G06F12/14 ,  H04L9/32 ,  H04L9/08

    CPC classification number: G06F12/1408 ,  G06F2212/1052 ,  H04L9/3278

    Abstract: A memory device, a memory system, and an operating method of the memory system is provided. The operating method includes operations of transmitting an authentication request to a memory device using a memory controller; converting the authentication request to a first address using the memory device; processing authentication data that corresponds to the first address and indicates a physical characteristic of the memory device and transmitting the authentication data as an authentication response to the authentication request to the memory controller using the memory device; and verifying whether the authentication response received from the memory device is an authentication response to the authentication request using the memory controller.

    Abstract translation: 提供了存储器件，存储器系统以及存储器系统的操作方法。 操作方法包括使用存储器控制器将认证请求发送到存储器件的操作; 使用所述存储设备将所述认证请求转换为第一地址; 处理与第一地址相对应的认证数据，并指示存储器件的物理特征，并且使用存储器件将认证数据作为认证请求发送给存储器控制器; 以及验证从所述存储器装置接收到的认证响应是否是使用所述存储器控制器对所述认证请求的认证响应。

    Method of determining deterioration state of memory device and memory system using the same
    16.
    发明授权
    Method of determining deterioration state of memory device and memory system using the same 有权
    确定存储器件和使用其的存储器系统的劣化状态的方法

    公开(公告)号：US09164881B2

    公开(公告)日：2015-10-20

    申请号：US14052801

    申请日：2013-10-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Chang-Kyu Seol ,  Jun-Jin Kong ,  Hong-Rak Son

    IPC: G06F3/00 ,  G06F13/00 ,  G06F12/00 ,  G06F11/00 ,  G11C29/00 ,  G11C29/50 ,  G06F11/10 ,  G11C16/34 ,  G11C11/56 ,  G06F11/34 ,  G11C16/26 ,  G11C29/04

    CPC classification number: G06F12/00 ,  G06F11/00 ,  G06F11/1048 ,  G06F11/3466 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/3418 ,  G11C16/3422 ,  G11C16/3427 ,  G11C16/349 ,  G11C29/00 ,  G11C29/50004 ,  G11C2029/0409

    Abstract: A method is provided for determining a deterioration condition of a memory device. The method includes calculating first information corresponding to a number of bits having a first logic value from data obtained by performing a first read operation on target storage region of the memory device using a first reference voltage as a read voltage, and calculating second information corresponding to a number of bits having a second logic value from data obtained by performing a second read operation on the target storage region using a second reference voltage as the read voltage. A deterioration condition of the target storage region is determined based on the first and second information. The first reference voltage is less than a first read voltage by which an erase state of the memory device is distinguished from an adjacent program state, and the second reference voltage is higher than the first read voltage.

    Abstract translation: 提供了一种用于确定存储器件的劣化状况的方法。 该方法包括：使用第一参考电压作为读取电压，通过对存储器件的目标存储区域执行第一读取操作获得的数据，计算与具有第一逻辑值的位数相对应的第一信息，并且计算对应于 具有来自通过使用第二参考电压作为读取电压对目标存储区域执行第二读取操作获得的数据的第二逻辑值的位数。 基于第一信息和第二信息确定目标存储区域的劣化条件。 第一参考电压小于第一读取电压，通过该第一读取电压将存储器件的擦除状态与相邻的程序状态区分开，并且第二参考电压高于第一读取电压。

    Apparatus that receives non-binary polar code and decoding method thereof
    17.
    发明授权
    Apparatus that receives non-binary polar code and decoding method thereof 有权

    公开(公告)号：US10742355B2

    公开(公告)日：2020-08-11

    申请号：US16566246

    申请日：2019-09-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Yong Son ,  Chang-Kyu Seol ,  Hong-Rak Son ,  Pil-Sang Yoon

    IPC: H04L1/00

    Abstract: An apparatus that receives a non-binary polar code through a channel includes a low-complexity decoder and a memory. The low-complexity decoder is configured to selectively calculate first common terms for input symbols in the non-binary polar code other than a first input symbol corresponding to a first target output symbol. The selective calculation uses a lower triangular kernel and log likelihood ratios of the input symbols generated based on a channel characteristic of the channel. The low-complexity decoder is also configured to calculate log likelihood ratios of the first target output symbol using the first common terms and to determine a value of the first target output symbol based on the log likelihood ratios of the first target output symbol. The memory is accessible by the low-complexity decoder and is configured to store the first common terms.

    Memory device, memory system, and operating method of memory system
    19.
    发明授权
    Memory device, memory system, and operating method of memory system 有权
    存储器件，存储器系统以及存储器系统的操作方法

    公开(公告)号：US09569371B2

    公开(公告)日：2017-02-14

    申请号：US14626989

    申请日：2015-02-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seong-Hyeog Choi ,  Jun-Jin Kong ,  Hong-Rak Son ,  Pil-Sang Yoon ,  Chang-Kyu Seol

    IPC: H04L29/06 ,  G06F12/14 ,  H04L9/32 ,  G06F11/30

    CPC classification number: G06F12/1408 ,  G06F2212/1052 ,  H04L9/3278

    Abstract: A memory device, a memory system, and an operating method of the memory system is provided. The operating method includes operations of transmitting an authentication request to a memory device using a memory controller; converting the authentication request to a first address using the memory device; processing authentication data that corresponds to the first address and indicates a physical characteristic of the memory device and transmitting the authentication data as an authentication response to the authentication request to the memory controller using the memory device; and verifying whether the authentication response received from the memory device is an authentication response to the authentication request using the memory controller.

    Abstract translation: 提供了存储器件，存储器系统以及存储器系统的操作方法。 操作方法包括使用存储器控制器将认证请求发送到存储器件的操作; 使用所述存储设备将所述认证请求转换为第一地址; 处理与第一地址相对应的认证数据，并指示存储器件的物理特征，并且使用存储器件将认证数据作为认证请求发送给存储器控制器; 以及验证从所述存储器装置接收到的认证响应是否是使用所述存储器控制器对所述认证请求的认证响应。

    Nonvolatile memory system, storage device and method for operating nonvolatile memory device
    20.
    发明授权
    Nonvolatile memory system, storage device and method for operating nonvolatile memory device 有权
    非易失性存储器系统，用于操作非易失性存储器件的存储设备和方法

    公开(公告)号：US09268531B1

    公开(公告)日：2016-02-23

    申请号：US14722751

    申请日：2015-05-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seong-Hoon Woo ,  Hak-Sun Kim ,  Seong-Hyeog Choi ,  Jun-Jin Kong ,  Hong-Rak Son ,  Soon-Jae Won ,  Jung-Soo Chung

    IPC: G06F7/58 ,  G11C16/04

    CPC classification number: G06F7/58 ,  G06F7/588 ,  G11C7/14 ,  G11C16/0466 ,  G11C16/10 ,  G11C16/28

    Abstract: A nonvolatile memory device includes a data generating unit for generating a first reference value randomly or pseudo-randomly according to a first program request to program data in a memory cell, a seed selecting unit for selecting at least one of a plurality of seeds using the first reference value, and a randomizer for generating randomized data by using the selected seed. The data generating unit regenerates the first reference value as a second reference value different from the first reference value when a second program request is made, and the seed selecting unit selects another seed using the second reference value.

    Abstract translation: 非易失性存储器件包括：数据生成单元，用于根据第一程序请求随机地或随机地生成第一参考值，以对存储单元中的数据进行编程;种子选择单元，用于使用所述种子选择单元选择多个种子中的至少一个; 第一参考值，以及用于通过使用所选种子来生成随机数据的随机化器。 当进行第二程序请求时，数据生成单元将作为与第一参考值不同的第二参考值重新生成第一参考值，并且种子选择单元使用第二参考值选择另一种子。

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