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    SEMICONDUCTOR DEVICES
    11.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20230275091A1

    公开(公告)日：2023-08-31

    申请号：US18142210

    申请日：2023-05-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    CPC classification number: H01L27/0924 ,  H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    SEMICONDUCTOR DEVICES
    12.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220115375A1

    公开(公告)日：2022-04-14

    申请号：US17348962

    申请日：2021-06-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    Semiconductor device
    15.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12040402B2

    公开(公告)日：2024-07-16

    申请号：US17690178

    申请日：2022-03-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Nam Kyu Cho ,  Seok Hoon Kim ,  Yong Seung Kim ,  Pan Kwi Park ,  Dong Suk Shin ,  Sang Gil Lee ,  Si Hyung Lee

    IPC: H01L29/76 ,  H01L27/088 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78 ,  H01L29/94

    CPC classification number: H01L29/7851 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/41791

    Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.

    Semiconductor devices
    16.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11670638B2

    公开(公告)日：2023-06-06

    申请号：US17348962

    申请日：2021-06-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    CPC classification number: H01L27/0924 ,  H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    Semiconductor devices and methods of fabricating the same
    19.
    发明授权
    Semiconductor devices and methods of fabricating the same 有权

    公开(公告)号：US10903108B2

    公开(公告)日：2021-01-26

    申请号：US15869718

    申请日：2018-01-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sunguk Jang ,  Seokhoon Kim ,  Seung Hun Lee ,  Yang Xu ,  Jeongho Yoo ,  Jongryeol Yoo ,  Youngdae Cho

    IPC: H01L21/76 ,  H01L21/762 ,  H01L21/225 ,  H01L29/423 ,  H01L21/02 ,  H01L29/66 ,  H01L29/165 ,  H01L29/78

    Abstract: Semiconductor devices and methods of forming the same are provided. The methods may implanting dopants into a substrate to form a preliminary impurity region and heating the substrate to convert the preliminary impurity region into an impurity region. Heating the substrate may be performed at an ambient temperature of from about 800° C. to about 950° C. for from about 20 min to about 50 min. The method may also include forming first and second trenches in the impurity region to define an active tin and forming a first isolation layer and a second isolation layer in the first and second trenches, respectively. The first and second isolation layers may expose opposing sides of the active fin. The method may further include forming a gate insulation layer extending on the opposing sides and an upper surface of the active fin and forming a gate electrode traversing the active fin.

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