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公开(公告)号：US10367528B2
公开(公告)日：2019-07-30
申请号：US15179069
申请日：2016-06-10
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Idan Goldenberg , Alexander Bazarsky , Stella Achtenberg , Ishai Ilani , Eran Sharon
Abstract: In an illustrative example, a method includes receiving data to be processed in accordance with a convolutional low-density parity-check (CLDPC) code. The method also includes processing the data based on a parity check matrix associated with the CLDPC code. The parity check matrix includes a first portion and a second portion. The first portion includes a plurality of copies of a first sub-matrix that is associated with a first sub-code, and the second portion includes a copy of second sub-matrix that is associated with a second sub-code.
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公开(公告)号：US10223199B2
公开(公告)日：2019-03-05
申请号：US15274037
申请日：2016-09-23
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Judah Gamliel Hahn , Gadi Vishne , Joshua Lehmann , Alexander Bazarsky , Ariel Navon
IPC: G11C11/10 , G11C16/10 , G11C16/26 , G11C29/52 , G06F3/06 , G06F11/10 , H04L1/00 , G11C11/56 , H04L12/24 , H04L29/06 , G11C16/04 , G11C16/30 , G11C16/32 , G11C29/02 , G11C29/04
Abstract: A non-volatile memory system receives a request to read data. That request includes a quality of service indication. The memory system performs a read process that satisfies the quality of service indication and identifies a set of data with errors. The memory system returns the set of data with errors in response to the request.
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公开(公告)号：US20180287632A1
公开(公告)日：2018-10-04
申请号：US15475666
申请日：2017-03-31
Applicant: SanDisk Technologies LLC
Inventor： Rami Rom , ldan Goldenberg , Alexander Bazarsky , Eran Sharon , Ran Zamir , ldan Alrod , Stella Achtenberg
CPC classification number: H03M13/11 , G06F3/0619 , G06F3/0655 , G06F3/0688 , H03M13/1125 , H03M13/6566
Abstract: A storage device may program data differently for different memory areas of a memory. In some embodiments, the storage device may use different codebooks for different memory areas. In other embodiments, the storage device may modify bit orders differently for different memory areas. What codebook the storage device uses or what bit order modification the storage device performs for a particular memory area may depend on the bad storage locations specific to that memory area. Where different codebooks are used, optimal codebooks may be selected from a library, or codebooks may be modified based on the bad storage locations of the memory areas.
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公开(公告)号：US09898229B1
公开(公告)日：2018-02-20
申请号：US15223595
申请日：2016-07-29
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Judah Gamliel Hahn , Gadi Vishne , Joshua Lehmann , Alexander Bazarsky , Ariel Navon
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0611 , G06F3/0653 , G06F3/0673 , G06F3/0679 , G06F3/0688 , G06F11/1068 , G11C29/52
Abstract: A data storage device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to initiate a read operation to retrieve data from the non-volatile memory. The controller is also configured to suspend the read operation and to determine context information associated with the suspended read operation. The controller is further configured, in response to detecting a condition indicating that the read operation is to resume, to resume the suspended read operation using the context information.
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公开(公告)号：US11488682B2
公开(公告)日：2022-11-01
申请号：US16911333
申请日：2020-06-24
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Tomer Eliash , Alexander Bazarsky , Eran Sharon
Abstract: An integrated memory assembly comprises a memory die and a control die bonded to the memory die. The memory die includes a memory structure of non-volatile memory cells. The control die is configured to program user data to and read user data from the memory die based on one or more operational parameters. The control die is configured to calibrate the one or more operational parameters for the memory die. The control die is also configured to perform testing of the memory die using the calibrated one or more operational parameters.
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Patent Agency Ranking
公开(公告)号：US20210407613A1
公开(公告)日：2021-12-30
申请号：US16911333
申请日：2020-06-24
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Tomer Eliash , Alexander Bazarsky , Eran Sharon
Abstract: An integrated memory assembly comprises a memory die and a control die bonded to the memory die. The memory die includes a memory structure of non-volatile memory cells. The control die is configured to program user data to and read user data from the memory die based on one or more operational parameters. The control die is configured to calibrate the one or more operational parameters for the memory die. The control die is also configured to perform testing of the memory die using the calibrated one or more operational parameters.
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公开(公告)号：US10379940B2
公开(公告)日：2019-08-13
申请号：US15372485
申请日：2016-12-08
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Omer Fainzilber , Ariel Navon , Alexander Bazarsky , David Gur , Stella Achtenberg
IPC: G06F11/10
Abstract: A method of operation of a data storage device includes inputting data to a decoder of the data storage device. The method further includes sending a command to a memory of the data storage device in response to an indication of a pipeline delay associated with a decoding process to decode the data. The command indicates an operation to be performed at the memory to in response to the pipeline delay.
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18.发明授权公开(公告)号：US10355712B2
公开(公告)日：2019-07-16
申请号：US15475602
申请日：2017-03-31
Applicant: SanDisk Technologies LLC
Inventor： Rami Rom , Idan Goldenberg , Alexander Bazarsky , Eran Sharon , Ran Zamir , Idan Alrod , Stella Achtenberg
Abstract: A storage device may program data differently for different memory areas of a memory. In some embodiments, the storage device may use different codebooks for different memory areas. In other embodiments, the storage device may modify bit orders differently for different memory areas. What codebook the storage device uses or what bit order modification the storage device performs for a particular memory area may depend on the bad storage locations specific to that memory area. Where different codebooks are used, optimal codebooks may be selected from a library, or codebooks may be modified based on the bad storage locations of the memory areas.
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公开(公告)号：US10432232B2
公开(公告)日：2019-10-01
申请号：US15252753
申请日：2016-08-31
Applicant: SanDisk Technologies LLC
Inventor： Ran Zamir , Alexander Bazarsky , Eran Sharon , Idan Alrod
Abstract: A non-volatile memory system may be configured to generate a codeword with first-type parity bits and one or more second-type parity bits. If a storage location in which the codeword is to be stored includes one or more bad memory cells, the bit sequence of the codeword may be arranged so that at least some of the second-type parity bits are stored in the bad memory cells. During decoding, a first set of syndrome values may be determined for a first set of check nodes and a second set of syndrome values may be determined for a second set of check nodes. In some examples, a syndrome weight used for determining if convergence is achieved may be calculated using check nodes that are unassociated with the second-type parity bits.
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公开(公告)号：US10250281B2
公开(公告)日：2019-04-02
申请号：US15395185
申请日：2016-12-30
Applicant: SANDISK TECHNOLOGIES LLC
Inventor： Stella Achtenberg , Omer Fainzilber , Ariel Navon , Alexander Bazarsky , Eran Sharon
Abstract: A device includes a non-volatile memory, a traffic analyzer, and a parameter adjuster. The traffic analyzer is configured to generate a traffic type indicator based on one or more read requests from an access device to access data at the non-volatile memory. The traffic type indicator has a first value responsive to the one or more read requests corresponding to a first traffic type and has a second value responsive to the one or more read requests corresponding to a second traffic type. The parameter adjuster is configured to designate one or more decode parameter values based on the traffic type indicator.
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