公开(公告)号：US11302471B2

公开(公告)日：2022-04-12

申请号：US16744484

申请日：2020-01-16

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Gabriella Ghidini ,  Enzo Carollo ,  Fabrizio Fausto Renzo Toia

IPC: H01F27/28 ,  H01F27/32 ,  H01L23/522 ,  H01L23/64 ,  H01L27/08 ,  H01F41/063 ,  H01L23/66

Abstract: An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding.

公开(公告)号：US10930799B2

公开(公告)日：2021-02-23

申请号：US16246945

申请日：2019-01-14

Applicant: STMicroelectronics S.r.l.

Inventor： Flavio Francesco Villa ,  Marco Morelli ,  Marco Marchesi ,  Simone Dario Mariani ,  Fabrizio Fausto Renzo Toia

IPC: H01L29/94 ,  H01L29/66 ,  H01L27/06 ,  H01L49/02 ,  H01L21/02

Abstract: A semiconductor body includes a front side and a back side and is configured to support an electronic circuit. A buried region is provided in the semiconductor body at a location between the electronic circuit and the back side. The buried region includes a layer of conductive material and a dielectric layer, where the dielectric layer is arranged between the layer of conductive material and the semiconductor body. A conductive path extends between the buried region and the front side to form a path for electrical access to the layer of conductive material. A capacitor is thus formed with the layer of conductive material providing a capacitor plate and the dielectric layer providing the capacitor dielectric. A further capacitor plate is provided by the semiconductor body, or by a further layer of conductive material in the buried region.

公开(公告)号：US10535767B2

公开(公告)日：2020-01-14

申请号：US16264384

申请日：2019-01-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Marco Sambi ,  Fabrizio Fausto Renzo Toia ,  Marco Marchesi ,  Marco Morelli ,  Riccardo Depetro ,  Giuseppe Barillaro ,  Lucanos Marsilio Strambini

IPC: H01L21/02 ,  H01L29/78 ,  H01L29/32 ,  H01L29/66 ,  H01L29/861 ,  H01L29/06 ,  H01L29/16 ,  H01L21/265 ,  H01L21/3063 ,  H01L21/308 ,  H01L21/762 ,  H01L29/08 ,  H01L29/36 ,  H01L29/417 ,  H03K17/687

Abstract: A process of forming integrated electronic device having a semiconductor body includes: forming a first electrode region having a first type of conductivity; forming a second electrode region having a second type of conductivity, which forms a junction with the first electrode region; and forming a nanostructured semiconductor region, which extends in one of the first and second electrode regions.

公开(公告)号：US20180097055A1

公开(公告)日：2018-04-05

申请号：US15454096

申请日：2017-03-09

Applicant: STMicroelectronics S.r.l.

Inventor： Elisabetta Pizzi ,  Fabrizio Fausto Renzo Toia ,  Marco Marchesi ,  Vincenzo Palumbo

IPC: H01L49/02 ,  H01L23/64 ,  H01F27/28 ,  H01F27/245 ,  H01F41/04 ,  H01F41/02

Abstract: A dielectric structure extends over the substrate and a transformer is integrated in the dielectric structure. The transformed includes a first winding in the dielectric layer at a first height and a second winding in the dielectric layer at a second height greater than the first height. The first and second windings are magnetically coupleable to one another. A magnetic element is positioned in alignment with the first and second windings. In one implementation, the magnetic element underlies the first winding in a position between the substrate and the first winding. In another implementation, the magnetic element overlies the second winding.

公开(公告)号：US20180061982A1

公开(公告)日：2018-03-01

申请号：US15457799

申请日：2017-03-13

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Marco Sambi ,  Fabrizio Fausto Renzo Toia ,  Marco Marchesi ,  Marco Morelli ,  Riccardo Depetro ,  Giuseppe Barillaro ,  Lucanos Marsilio Strambini

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/417 ,  H01L29/36 ,  H01L29/66 ,  H01L21/3063 ,  H01L21/265 ,  H01L21/308 ,  H01L21/02 ,  H01L29/08 ,  H01L21/762 ,  H03K17/687

CPC classification number: H01L29/7827 ,  H01L21/02233 ,  H01L21/02255 ,  H01L21/26513 ,  H01L21/3063 ,  H01L21/3081 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0665 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/32 ,  H01L29/36 ,  H01L29/41741 ,  H01L29/66128 ,  H01L29/66666 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/8611 ,  H03K17/687

Abstract: An integrated electronic device having a semiconductor body including: a first electrode region having a first type of conductivity; and a second electrode region having a second type of conductivity, which forms a junction with the first electrode region. The integrated electronic device further includes a nanostructured semiconductor region, which extends in one of the first and second electrode regions.

公开(公告)号：US20170250253A1

公开(公告)日：2017-08-31

申请号：US15250638

申请日：2016-08-29

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Fabrizio Fausto Renzo Toia ,  Claudio Contiero ,  Elisabetta Pizzi ,  Simone Dario Mariani

IPC: H01L29/10 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/1087 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/0265 ,  H01L21/02664 ,  H01L21/3247 ,  H01L21/74 ,  H01L21/743 ,  H01L23/535 ,  H01L29/1083 ,  H01L29/401 ,  H01L29/7802

Abstract: A semiconductor device comprising: a semiconductor body including an active region that houses an electronic component and a passive dielectric region surrounding the active region; a conductive buried region, of metallic material or metallic alloy, which extends in the semiconductor body in the active region; and one or more electrical contacts, of metallic material, which extend between the conductive buried region and a top surface of the semiconductor body, and form respective paths for electrical access to the conductive buried region.