公开(公告)号：US20170278841A1

公开(公告)日：2017-09-28

申请号：US15279050

申请日：2016-09-28

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Vincenzo Palumbo ,  Elisabetta Pizzi

IPC: H01L27/02 ,  H01L21/283 ,  H01L23/00 ,  H01L21/768 ,  H01L49/02 ,  H01L23/522

CPC classification number: H01L27/0288 ,  H01L21/283 ,  H01L21/76883 ,  H01L23/48 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L24/48 ,  H01L24/49 ,  H01L28/60 ,  H01L2224/481 ,  H01L2224/48463 ,  H01L2224/49107 ,  H04L25/026

Abstract: An electronic device includes a semiconductor body and a dielectric layer extending over the semiconductor body. A galvanic isolation module includes a first metal region extending in the dielectric layer at a first height and a second metal region extending in the dielectric layer at a second height greater than the first height. The first and second metal regions are capacitively or magnetically coupleable together. The second metal region includes a side wall and a bottom wall coupled to one another through rounded surface portions.

公开(公告)号：US09461104B2

公开(公告)日：2016-10-04

申请号：US14309357

申请日：2014-06-19

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Mirko Venturato

IPC: H01L49/02 ,  H01L23/522 ,  H01L27/02 ,  H01L27/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  G01R15/04 ,  H01L23/58 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L28/20 ,  G01R15/04 ,  H01L23/5225 ,  H01L23/5228 ,  H01L23/585 ,  H01L27/0207 ,  H01L27/0629 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/405 ,  H01L29/66681 ,  H01L29/7817 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a semiconductor substrate; a high-voltage first resistive structure which extends along a spiral path above the substrate and is separated from the substrate by a first dielectric layer; and a conductive shielding structure, including a plurality of first shielding strips, which are arranged in sequence along respective portions of the first resistive structure and are separated from the first resistive structure by a second dielectric layer.

Abstract translation: 半导体器件包括：半导体衬底; 高压第一电阻结构，其沿着衬底上方的螺旋路径延伸并且通过第一介电层与衬底分离; 以及导电屏蔽结构，包括多个第一屏蔽条，其沿着第一电阻结构的相应部分依次布置并且通过第二电介质层与第一电阻结构分离。

公开(公告)号：US10199370B2

公开(公告)日：2019-02-05

申请号：US15900041

申请日：2018-02-20

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Elisabetta Pizzi

IPC: H01L27/02 ,  H01L49/02 ,  H01L23/522 ,  H01L23/00 ,  H01L21/768 ,  H01L21/283 ,  H01L23/48 ,  H04L25/02

Abstract: A method of manufacturing an electronic device for providing galvanic isolation includes forming a dielectric layer on a semiconductor body and integrating, in the dielectric layer, a galvanic isolation module, the integrating including forming a first metal region at a first height of the dielectric layer. A second metal region is formed at a second height greater than the first height of the dielectric layer, the first and second metal regions being at least one of capacitively and magnetically coupleable together. Forming the second metal region includes etching selective portions of the dielectric layer to form at least one trench having a side wall coupled to a bottom wall through rounded surface portions, and filling each trench with metal material to form the second metal region having rounded edges.

公开(公告)号：US20180190646A1

公开(公告)日：2018-07-05

申请号：US15900041

申请日：2018-02-20

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Elisabetta Pizzi

IPC: H01L27/02 ,  H01L23/522 ,  H01L21/283 ,  H01L21/768 ,  H01L23/00 ,  H01L49/02

CPC classification number: H01L27/0288 ,  H01L21/283 ,  H01L21/76883 ,  H01L23/48 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L28/60 ,  H01L2224/45144 ,  H01L2224/481 ,  H01L2224/48463 ,  H01L2224/49107 ,  H04L25/026 ,  H01L2924/00014

Abstract: A method of manufacturing an electronic device for providing galvanic isolation includes forming a dielectric layer on a semiconductor body and integrating, in the dielectric layer, a galvanic isolation module, the integrating including forming a first metal region at a first height of the dielectric layer. A second metal region is formed at a second height greater than the first height of the dielectric layer, the first and second metal regions being at least one of capacitively and magnetically coupleable together. Forming the second metal region includes etching selective portions of the dielectric layer to form at least one trench having a side wall coupled to a bottom wall through rounded surface portions, and filling each trench with metal material to form the second metal region having rounded edges.

公开(公告)号：US10541079B2

公开(公告)日：2020-01-21

申请号：US16267811

申请日：2019-02-05

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Gabriella Ghidini ,  Enzo Carollo ,  Fabrizio Fausto Renzo Toia

IPC: H01F27/28 ,  H01F27/32 ,  H01L23/522 ,  H01L23/64 ,  H01L27/08 ,  H01F41/063 ,  H01L23/66

Abstract: An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding.

公开(公告)号：US20170141775A1

公开(公告)日：2017-05-18

申请号：US15163142

申请日：2016-05-24

Applicant: STMicroelectronics S.R.L.

Inventor： Giovanni Caggegi ,  Francesco Pulvirenti ,  Giuseppe Cantone ,  Vincenzo Palumbo

IPC: H03K17/687 ,  H01L29/78 ,  H03K5/24

CPC classification number: H03K17/687 ,  H01L29/7816 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/74 ,  H03K2017/066

Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.

公开(公告)号：US20140167193A1

公开(公告)日：2014-06-19

申请号：US14104934

申请日：2013-12-12

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo Iuliano ,  Francesca Milanesi ,  Vincenzo Palumbo ,  Sonia Pirotta

IPC: H01L27/22 ,  H01L43/14

CPC classification number: H01L27/22 ,  G01R33/0052 ,  H01L27/0688 ,  H01L43/04 ,  H01L43/14

Abstract: A semiconductor device including: a semiconductor body having a first side and a second side opposite to one another; a first barrier element, which extends over the first side of the semiconductor body and is made of a first material configured to act as barrier against metal ions, for example chosen from among titanium, tantalum, titanium alloys or compounds, tantalum alloy; a magnetic element, which extends over the first barrier layer and is made of a second material having magnetic properties, for example a ferromagnetic material; a second barrier element, which extends over the magnetic layer and is made of a third material configured to act as barrier against metal ions, for example chosen from among titanium, tantalum, titanium alloys or compounds, tantalum alloys or compounds. The first and second barrier elements form a top encapsulating structure and a bottom encapsulating structure for the magnetic element.

Abstract translation: 一种半导体器件，包括：具有彼此相对的第一侧和第二侧的半导体本体; 第一屏障元件，其延伸在半导体本体的第一侧上，并且由构造成用作阻挡金属离子的第一材料制成，例如选自钛，钽，钛合金或化合物，钽合金; 磁性元件，其在第一阻挡层上延伸并且由具有磁性的第二材料制成，例如铁磁材料; 第二屏障元件，其在磁性层上延伸并由构成为用作阻挡金属离子的第三材料制成，例如选自钛，钽，钛合金或化合物，钽合金或化合物。 第一和第二屏障元件形成顶部封装结构和用于磁性元件的底部封装结构。

公开(公告)号：US10236115B2

公开(公告)日：2019-03-19

申请号：US14733009

申请日：2015-06-08

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Gabriella Ghidini ,  Enzo Carollo ,  Fabrizio Fausto Renzo Toia

IPC: H01F27/28 ,  H01F27/32 ,  H01L23/522 ,  H01L23/64 ,  H01L27/08 ,  H01F41/063

Abstract: An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding.

公开(公告)号：US11302471B2

公开(公告)日：2022-04-12

申请号：US16744484

申请日：2020-01-16

Applicant: STMicroelectronics S.r.l.

Inventor： Vincenzo Palumbo ,  Gabriella Ghidini ,  Enzo Carollo ,  Fabrizio Fausto Renzo Toia

IPC: H01F27/28 ,  H01F27/32 ,  H01L23/522 ,  H01L23/64 ,  H01L27/08 ,  H01F41/063 ,  H01L23/66

Abstract: An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding.

公开(公告)号：US10084446B2

公开(公告)日：2018-09-25

申请号：US15163142

申请日：2016-05-24

Applicant: STMicroelectronics S.R.L.

Inventor： Giovanni Caggegi ,  Francesco Pulvirenti ,  Giuseppe Cantone ,  Vincenzo Palumbo

IPC: H03K17/687 ,  H01L29/78 ,  H03K5/24 ,  H03K17/0412 ,  H03K17/06 ,  H03K17/74

CPC classification number: H03K17/687 ,  H01L29/7816 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/74 ,  H03K2017/066

Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.