公开(公告)号：US20210225425A1

公开(公告)日：2021-07-22

申请号：US17038488

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunggeun Do ,  Youngsik Kim ,  Gongheum Han ,  Sangyun Kim ,  Seunghyun Cho

IPC: G11C11/408 ,  G11C11/4074 ,  G11C11/406 ,  G11C5/06

Abstract: A memory device includes a word line driver circuit, which can advantageously reduce gate stress on a transistor using a lower high voltage that varies with a command, and an operating method of the memory device. The memory device includes a plurality of memory blocks, provides a high voltage or the lower high voltage to a variable high voltage line in response to a block select signal, and changes a level of the lower high voltage to a low voltage level, a medium voltage level, or a high voltage level based on the command. The memory device applies the lower high voltage to gates of P-type metal oxide semiconductor (PMOS) transistors connected to a word line driving signal, which drives word lines of non-selected memory blocks among the plurality of memory blocks.

公开(公告)号：US20130256186A1

公开(公告)日：2013-10-03

申请号：US13783657

申请日：2013-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doojin Kim ,  Hyungjin Lee ,  Youngsik Kim ,  Sungbok Hong ,  Yongmin Kim ,  Chulmin Kim

IPC: H01L21/673

CPC classification number: H01L21/6735 ,  H01L21/6732

Abstract: A strip member loading magazine, which may load strip members such as semiconductor integrated circuit lead frames, for example, may include a bottom plate, a plurality of first slot plates provided at opposite sides of the bottom plate, a top plate fixed to a top portion of the first slot plates to be parallel to the bottom plate, second slot plates disposed to face each other between the first slot plates and be able to be moved, and locking units fastening the second slot plates to at least the top or bottom plate, the second slot plates being fastened parallel to the first slot plates.

Abstract translation: 例如，可以装载诸如半导体集成电路引线框架的条状部件的条形部件装载仓可以包括底板，设置在底板的相对侧的多个第一狭槽板，固定到顶部的顶板 所述第一狭槽板的一部分平行于所述底板，所述第二狭槽板设置成在所述第一狭槽板之间彼此面对并且能够移动;以及锁定单元，其将所述第二狭槽板紧固到至少所述顶板或底板 第二槽板平行于第一槽板固定。

公开(公告)号：US11450376B2

公开(公告)日：2022-09-20

申请号：US17038488

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunggeun Do ,  Youngsik Kim ,  Gongheum Han ,  Sangyun Kim ,  Seunghyun Cho

IPC: G11C11/408 ,  G11C5/06 ,  G11C11/406 ,  G11C11/4074

Abstract: A memory device includes a word line driver circuit, which can advantageously reduce gate stress on a transistor using a lower high voltage that varies with a command, and an operating method of the memory device. The memory device includes a plurality of memory blocks, provides a high voltage or the lower high voltage to a variable high voltage line in response to a block select signal, and changes a level of the lower high voltage to a low voltage level, a medium voltage level, or a high voltage level based on the command. The memory device applies the lower high voltage to gates of P-type metal oxide semiconductor (PMOS) transistors connected to a word line driving signal, which drives word lines of non-selected memory blocks among the plurality of memory blocks.

公开(公告)号：US11114747B2

公开(公告)日：2021-09-07

申请号：US16441376

申请日：2019-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chungkyun Ham ,  Seunggil Jeon ,  Jaehun Jung ,  Youngsik Kim

IPC: H01Q1/24 ,  H01Q9/06 ,  H01Q9/42 ,  H01Q5/42 ,  H01Q21/28 ,  H01Q21/06 ,  H05K1/16

Abstract: An electronic device is provided. The electronic device includes a housing including a first plate, a second plate facing away from the first plate, and a side member surrounding a space between the first plate and the second plate, a first PCB disposed in parallel with the first plate in the space between the first plate and the second plate, and including a first face facing the first plate and a second face facing the second plate, at least one conductive plate formed on the second face, a first conductive pattern embedded in the first PCB and disposed to be closer to a portion of the side member than the conductive plate when viewed from above the first plate, a first wireless communication circuit mounted on a first face of the first PCB, electrically coupled to the conductive plate and the first conductive pattern.

公开(公告)号：US10211084B2

公开(公告)日：2019-02-19

申请号：US15215578

申请日：2016-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doojin Kim ,  Youngsik Kim ,  Kunho Song ,  Yongdae Ha

IPC: B24B27/00 ,  H01L21/683 ,  B24B37/10 ,  B24B37/30 ,  B24B37/34 ,  H01L21/687 ,  B25B11/00

Abstract: A chuck table is provided and a substrate processing system including the same. The chuck table includes a base disk having a first vacuum hole, and a chuck disk disposed on the first vacuum hole. The chuck disk includes a plurality of first sectors and a first connection member connecting the first sectors to each other.

公开(公告)号：US09171821B2

公开(公告)日：2015-10-27

申请号：US14595638

申请日：2015-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doojin Kim ,  Youngsik Kim ,  Kitaik Oh ,  Sungbok Hong

IPC: H01L21/00 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48616 ,  H01L2224/48624 ,  H01L2224/48992 ,  H01L2224/48997 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/85365 ,  H01L2224/85416 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/48455

Abstract: A semiconductor package comprises a board including a board pad, a plurality of semiconductor chips mounted on the board, the semiconductor chips including chip pads. Bumps are disposed on the chip pads, respectively, and a wire is disposed between the chip pads and the bumps. The wire electrically connects the chip pads of the plurality of semiconductor chips and the board pad to each other.

公开(公告)号：US11847024B2

公开(公告)日：2023-12-19

申请号：US17972804

申请日：2022-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeongho Lee ,  Youngsik Kim ,  Seungyou Baek ,  Eunchu Oh ,  Youngkwang Yoo ,  Younggeun Lee

IPC: G06F11/10 ,  G06F3/06

CPC classification number: G06F11/1076 ,  G06F3/0619 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679

Abstract: A memory controller for controlling a memory operation of a memory device includes: an error correction code (ECC) circuit configured to detect an error of first read data read from the memory device and correct the error; an error type detection logic configured to write first write data to the memory device, compare second read data with the first write data, detect an error bit of the second read data based on a result of the comparing, and output information about an error type identified by the error bit; and a data patterning logic configured to change a bit pattern of input data to reduce an error of the second read data based on the information about the error type.

公开(公告)号：US11144393B2

公开(公告)日：2021-10-12

申请号：US16840581

申请日：2020-04-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeongho Lee ,  Youngsik Kim ,  Seungyou Baek ,  Eunchu Oh ,  Youngkwang Yoo ,  Younggeun Lee

IPC: G06F11/10 ,  G06F3/06

Abstract: A memory controller for controlling a memory operation of a memory device includes: an error correction code (ECC) circuit configured to detect an error of first read data read from the memory device and correct the error; an error type detection logic configured to write first write data to the memory device, compare second read data with the first write data, detect an error bit of the second read data based on a result of the comparing, and output information about an error type identified by the error bit; and a data patterning logic configured to change a bit pattern of input data to reduce an error of the second read data based on the information about the error type.

公开(公告)号：US10789019B2

公开(公告)日：2020-09-29

申请号：US15855840

申请日：2017-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngsik Kim ,  Jinwoo Kim ,  Hee Hyun Nam ,  Kyungbo Yang ,  Ji-Seung Youn ,  Younggeun Lee

IPC: G06F9/46 ,  G06F3/06 ,  G06F12/02 ,  G06F1/30 ,  G06F9/50 ,  G06F12/10

Abstract: A storage device includes a nonvolatile memory and a controller. The controller includes a job manager circuit and a processor. The job manager circuit manages a first-type job associated with the nonvolatile memory, and the processor processes a second-type job associated with the nonvolatile memory. The job manager circuit manages the first-type job without intervention of the processor. The processor provides a management command to the job manager circuit in response to a notification received from the job manager circuit, such that the second-type job is processed.

公开(公告)号：US20180293175A1

公开(公告)日：2018-10-11

申请号：US15662072

申请日：2017-07-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mu-Tien Chang ,  Heehyun Nam ,  Youngsik Kim ,  Youngjin Cho ,  Dimin Niu ,  Hongzhong Zheng

IPC: G06F12/121

Abstract: A method of choosing a cache line of a plurality of cache lines of data for eviction from a frontend memory, the method including assigning a baseline replacement score to each way of a plurality of ways of a cache, the ways respectively storing the cache lines, assigning a validity score to each way based on a degree of validity of the cache line stored in each way, assigning an eviction decision score to each way based on a function of the baseline replacement score for the way and the validity score for the way, and choosing a cache line of the way having a highest eviction decision score as the cache line for eviction.