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公开(公告)号：US20240258410A1
公开(公告)日：2024-08-01
申请号：US18531836
申请日：2023-12-07
发明人： Dongwoo Kim , Jinbum Kim
IPC分类号： H01L29/732 , H01L23/528 , H01L29/66
CPC分类号： H01L29/7325 , H01L23/5286 , H01L29/66287
摘要： A semiconductor device includes a substrate having a recessed region, a first semiconductor region including a first semiconductor layer on a bottom surface and an inner side surface of the recessed region and a first protrusion on the first semiconductor layer, and having a first conductivity type, a second semiconductor region including a second semiconductor layer on the first semiconductor layer and a second protrusion on the second semiconductor layer, and having a second conductivity type, a third semiconductor region including a third semiconductor layer on the second semiconductor layer and a third protrusion on the third semiconductor layer, and having the first conductivity type, a epitaxial stopper layer covering the bottom surface of the recessed region between the first semiconductor region and the substrate and including a material different from materials of the first semiconductor region, and a dummy gate structure intersecting the first to third protrusions on the substrate.
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公开(公告)号：US11984507B2
公开(公告)日：2024-05-14
申请号：US17206229
申请日：2021-03-19
发明人： Dongwoo Kim , Jinbum Kim , Gyeom Kim , Dohee Kim , Seunghun Lee
IPC分类号： H01L29/78 , H01L21/02 , H01L29/06 , H01L29/161 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/786
CPC分类号： H01L29/78618 , H01L21/02532 , H01L21/02603 , H01L29/0673 , H01L29/161 , H01L29/41733 , H01L29/42392 , H01L29/66545 , H01L29/66636 , H01L29/66742 , H01L29/78696
摘要： A semiconductor device including an active region extending in a first direction on a substrate; channel layers vertically spaced apart on the active region; a gate structure extending in a second direction and intersecting the active region, the gate structure surrounding the channel layers; a source/drain region on the active region in contact with the channel layers; and a contact plug connected to the source/drain region, wherein the source/drain region includes a first epitaxial layer on side surfaces of the channel layers and including a first impurity; a second epitaxial layer on the first epitaxial layer and including the first impurity and a second impurity; and a third epitaxial layer on the second epitaxial layer and including the first impurity, and in a horizontal sectional view, the second epitaxial layer includes a peripheral portion having a thickness in the first direction that increases along the second direction.
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公开(公告)号：US11664453B2
公开(公告)日：2023-05-30
申请号：US17192301
申请日：2021-03-04
发明人： Jaemun Kim , Dahye Kim , Jinbum Kim , Gyeom Kim , Dohee Kim , Dongwoo Kim , Seunghun Lee
IPC分类号： H01L29/78 , H01L29/66 , H01L29/417 , H01L21/8234 , H01L29/04
CPC分类号： H01L29/785 , H01L21/823431 , H01L29/41791 , H01L29/6681 , H01L29/66818 , H01L29/045
摘要： A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.
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公开(公告)号：US11626401B2
公开(公告)日：2023-04-11
申请号：US16991530
申请日：2020-08-12
发明人： Jaemun Kim , Gyeom Kim , Dahye Kim , Jinbum Kim , Kyungin Choi , Ilgyou Shin , Seunghun Lee
IPC分类号： H01L27/088 , H01L21/8234 , H01L21/02
摘要： An integrated circuit device includes: a fin-type active area protruding from a substrate, extending in a first direction parallel to an upper surface of the substrate, and including a first semiconductor material; an isolation layer arranged on the substrate and covering a lower portion of a sidewall of the fin-type active area, the isolation layer including an insulation liner conformally arranged on the lower portion of the sidewall of the fin-type active area, and an insulation filling layer on the insulation liner; a capping layer surrounding an upper surface and the sidewall of the fin-type active area, including a second semiconductor material different from the first semiconductor material, and with the capping layer having an upper surface, a sidewall, and a facet surface between the upper surface and the sidewall; and a gate structure arranged on the capping layer and extending in a second direction perpendicular to the first direction.
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公开(公告)号：US20220059654A1
公开(公告)日：2022-02-24
申请号：US17207690
申请日：2021-03-21
发明人： Jinbum Kim , Seokhoon Kim , Kwanheum Lee , Choeun Lee , Sujin Jung
IPC分类号： H01L29/08 , H01L29/78 , H01L29/167 , H01L29/786 , H01L29/06 , H01L29/66
摘要： A semiconductor device includes a channel, a first source/drain structure on a first side surface of the channel, a second source/drain structure on a second side surface of the channel, a gate structure surrounding the channel, an inner spacer layer on a side surface of the gate structure, and an outer spacer layer on an outer surface of the inner spacer layer. The first source/drain structure includes a first source/drain layer on the channel and a second source/drain layer on the first source/drain layer, and on a plane of the semiconductor device that passes through the channel, at least one of a first boundary line of the first source/drain layer in contact with the second source/drain layer and a second boundary line of the first source/drain layer in contact with the channel may be convex, extending toward the channel.
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公开(公告)号：US11094832B2
公开(公告)日：2021-08-17
申请号：US16744642
申请日：2020-01-16
发明人： Dahye Kim , Dongchan Suh , Jinbum Kim
IPC分类号： H01L29/786 , H01L29/78 , H01L29/423 , H01L29/06 , H01L29/66
摘要： A semiconductor device includes an active region extending on a substrate in a first direction and including an impurity region, a plurality of channel layers vertically spaced apart from each other on the active region, a gate structure extending on the substrate in a second direction to intersect the active region and the plurality of channel layers, and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and in contact with the plurality of channel layers, a barrier layer including a first barrier layer spaced apart from an upper surface of the active region and being disposed in the active region, and second barrier layers respectively disposed below the plurality of channel layers, and a contact plug connected to the source/drain region.
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公开(公告)号：US12113108B2
公开(公告)日：2024-10-08
申请号：US17472926
申请日：2021-09-13
发明人： Dohee Kim , Gyeom Kim , Jinbum Kim , Haejun Yu , Kyungin Choi , Kihyun Hwang , Seunghun Lee
IPC分类号： H01L29/41 , H01L27/088 , H01L29/417
CPC分类号： H01L29/41775 , H01L27/0886
摘要： An integrated circuit device includes a plurality of gate structures each including a gate line extending on a fin-type active region and insulation spacers on sidewalls of the gate line; a source/drain contact between first and second gate structures, and having opposing sides that are asymmetric in the first horizontal direction; and an insulation liner on sidewalls of the source/drain contact. The source/drain contact includes a lower contact portion and an upper contact portion having a horizontal extension that extends on an upper corner of the first gate structure, the insulation liner includes a first local region between the upper corner and the horizontal extension and a second local region that is farther from the substrate than the first local region, and a thickness of the first local region is greater than that of the second local region.
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公开(公告)号：US11888028B2
公开(公告)日：2024-01-30
申请号：US17862453
申请日：2022-07-12
发明人： Jinbum Kim , Dahye Kim , Seokhoon Kim , Jaemun Kim , Ilgyou Shin , Haejun Yu , Kyungin Choi , Kihyun Hwang , Sangmoon Lee , Seung Hun Lee , Keun Hwi Cho
IPC分类号： H01L29/08 , H01L21/8238 , H01L27/092 , H01L29/165 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786 , H01L29/161 , H01L21/8234 , H01L29/06
CPC分类号： H01L29/0847 , H01L21/823814 , H01L21/823828 , H01L27/092 , H01L29/165 , H01L29/42392 , H01L29/66545 , H01L29/78 , H01L29/7848 , H01L29/78696
摘要： A semiconductor device includes an active pattern on a substrate, a pair of source/drain patterns on the active pattern, a channel pattern between the pair of source/drain patterns, the channel pattern including semiconductor patterns stacked to be spaced apart from each other, and a gate electrode crossing the channel pattern and extending in a first direction. One of the pair of source/drain patterns includes a first semiconductor layer and a second semiconductor layer thereon. The first semiconductor layer is in contact with a first semiconductor pattern, which is one of the stacked semiconductor patterns. The largest widths of the first semiconductor pattern, the first semiconductor layer, and the second semiconductor layer in the first direction are a first width, a second width, a third width, respectively, and the second width is larger than the first width and smaller than the third width.
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公开(公告)号：US11777001B2
公开(公告)日：2023-10-03
申请号：US17742985
申请日：2022-05-12
发明人： Ilgyou Shin , Minyi Kim , Myung Gil Kang , Jinbum Kim , Seung Hun Lee , Keun Hwi Cho
IPC分类号： H01L29/15 , H01L29/78 , H01L29/417 , H01L29/10
CPC分类号： H01L29/158 , H01L29/1033 , H01L29/41791 , H01L29/785
摘要： A semiconductor device includes; a substrate including a first region and a second region, a first active pattern extending upward from the first region, a first superlattice pattern on the first active pattern, a first active fin centrally disposed on the first active pattern, a first gate electrode disposed on the first active fin, and first source/drain patterns disposed on opposing sides of the first active fin and on the first active pattern. The first superlattice pattern includes at least one first semiconductor layer and at least one first blocker-containing layer, and the first blocker-containing layer includes at least one of oxygen, carbon, fluorine and nitrogen.
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公开(公告)号：US11532620B2
公开(公告)日：2022-12-20
申请号：US17524128
申请日：2021-11-11
发明人： Kyungin Choi , Dahye Kim , Jaemun Kim , Jinbum Kim , Seunghun Lee
IPC分类号： H01L27/088 , H01L29/165 , H01L29/06 , H01L21/8234 , H01L21/02 , H01L29/66 , H01L21/306 , H01L21/762
摘要： Integrated circuit devices may include a fin-type active area, a semiconductor liner contacting a side wall of the fin-type active area and including a protrusion portion protruding outward from the fin-type active area in the vicinity of an edge of an upper surface of the fin-type active area, and an isolation layer spaced apart from the fin-type active area with the semiconductor liner therebetween. To manufacture the integrated circuit devices, a crystalline semiconductor layer covering the fin-type active area with a first thickness and an amorphous semiconductor layer covering the mask pattern with a second thickness may be formed, an extended crystalline semiconductor layer covering the mask pattern may be formed by crystalizing the amorphous semiconductor layer, and a semiconductor liner including a protrusion portion may be formed from the extended crystalline semiconductor layer and the crystalline semiconductor layer.
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