公开(公告)号：USD783689S1

公开(公告)日：2017-04-11

申请号：US29544742

申请日：2015-11-05

Applicant: Samsung Electronics Co., Ltd.

Designer： Kisoo Kim ,  Sanghoon Lee ,  Yeonjin Jo

公开(公告)号：US12266659B2

公开(公告)日：2025-04-01

申请号：US17843263

申请日：2022-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keunhwi Cho ,  Jinkyu Kim ,  Myunggil Kang ,  Dongwon Kim ,  Jaechul Kim ,  Sanghoon Lee

IPC: H01L27/118 ,  H03K19/20

Abstract: A semiconductor device includes a substrate including a first device region and a second device region, active regions spaced apart from each other on the substrate, having a constant width, extending in a first direction parallel to an upper surface of the substrate and including a first active region and a second active region provided on the first device region and a third active region and a fourth active region provided on the second device region, a plurality of channel layers provided on the active regions and configured to be spaced apart from each other in a direction perpendicular to the upper surface of the substrate, gate structures provided on the substrate and extending to cross the active regions and the plurality of channel layers, and source/drain regions provided on the active regions on at least one side of the gate structures.

公开(公告)号：US20240354915A1

公开(公告)日：2024-10-24

申请号：US18587252

申请日：2024-02-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungwan KIM ,  Deoksoo Park ,  Byoung-Ju Song ,  Sanghoon Lee

IPC: G06T5/92 ,  G06T5/40 ,  G06T5/50

CPC classification number: G06T5/92 ,  G06T5/40 ,  G06T5/50 ,  G06T2207/20021

Abstract: An image processing device is provided. The device includes: a processor configured to: perform first tone mapping on an input image frame using a brightness enhancement tone curve corresponding to a current ambient illuminance value to obtain a first result; obtain histogram tone curves by applying a variable contrast limit to a plurality of histograms respectively corresponding to a plurality of sub-images, constituting a previous image frame; perform second tone mapping on the input image frame by interpolating the histogram tone curves to obtain a second result; and provide output image data by performing third tone mapping on the input image frame based on the first result and the second result. The brightness enhancement tone curve corresponds to a first human vision system (HVS) response to a reference ambient illuminance value and a second HVS response to a target ambient illuminance value.

公开(公告)号：US12027172B2

公开(公告)日：2024-07-02

申请号：US16895577

申请日：2020-06-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taejin Lee ,  Subhojit Chakladar ,  Sanghoon Lee ,  Kyungtae Kim ,  Yuna Kim ,  Junhui Kim ,  Eunhye Shin ,  Jaegeun Lee ,  Hyunwoong Lim

IPC: G10L15/32 ,  G06F1/3206 ,  G06F1/3293 ,  G10L15/26 ,  G10L15/30

CPC classification number: G10L15/32 ,  G06F1/3206 ,  G06F1/3293 ,  G10L15/26 ,  G10L15/30 ,  Y02D10/00 ,  Y02D30/50

Abstract: Provided is an electronic device that includes a first processor for receiving an audio signal, performing first voice recognition on the audio signal, and transferring a driving signal to a second processor based on a result of the first voice recognition. The second processor performs second voice recognition based on a voice signal by the first voice recognition or the audio signal, in response to the driving signal.

公开(公告)号：US20240136920A1

公开(公告)日：2024-04-25

申请号：US18237122

申请日：2023-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonmyung Woo ,  Duhee Jang ,  Duhee Jang ,  Jeongil Kang ,  Hyungwan Kim ,  Sanghoon Lee

IPC: H02M1/42 ,  H02M1/38

CPC classification number: H02M1/4225 ,  H02M1/385

Abstract: The present disclosure provides power supply apparatuses and controlling methods thereof. In some embodiments, a power supply apparatus includes a power factor correction (PFC) circuit, and a control circuit configured to control the PFC circuit. The PFC circuit includes a power inputter configured to receive alternating current voltage to be rectified, an inductor having an end coupled to an end of the power inputter, a first switching element configured to be turned on and off according to a first control signal, a second switching element configured to be turned on and off according to a second control signal, and an outputter configured to output a direct current voltage through an output capacitor. The control circuit is further configured to respectively apply the first and second control signals to the first and second switching elements such that the first and the second switching elements are alternately turned on.

公开(公告)号：US11955475B2

公开(公告)日：2024-04-09

申请号：US18148810

申请日：2022-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woocheol Shin ,  Myunggil Kang ,  Minyi Kim ,  Sanghoon Lee

IPC: H01L21/00 ,  H01L21/8234 ,  H01L27/06

CPC classification number: H01L27/0629 ,  H01L21/823431 ,  H01L21/823481

Abstract: A resistor including a device isolation layer is described that includes a first active region and a second active region, a buried insulating layer, and an N well region. The N well region surrounds the first active region, the second active region, the device isolation layer and the buried insulating layer. A first doped region and a second doped region are disposed on the first active region and the second active region. The first doped region and the second doped region are in contact with the N well region and include n type impurities.

公开(公告)号：US11937431B2

公开(公告)日：2024-03-19

申请号：US17224695

申请日：2021-04-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghoon Lee

IPC: H10B43/40 ,  H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

CPC classification number: H10B43/40 ,  H01L21/28035 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/4925 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A semiconductor device includes a substrate having a first area and a second area and an active area limited by an isolation layer in the first area and the second area, a p-type gate electrode doped with p-type impurities and including a p-type lower gate layer and a p-type upper gate layer on the p-type lower gate layer with a first gate dielectric layer disposed between the active area and the p-type gate electrode in the first area, and an n-type gate electrode doped with n-type impurities and including an n-type lower gate layer and an n-type upper gate layer on the n-type lower gate layer with a second gate dielectric layer disposed between the active area and the n-type gate electrode in the second area.

公开(公告)号：US11921158B2

公开(公告)日：2024-03-05

申请号：US18075542

申请日：2022-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byung-Sung Kim ,  Yun-Hyok Choi ,  Gyuyeol Kim ,  Sungjung Kim ,  Cheol-Heui Park ,  Sanghoon Lee ,  Jae-Woong Choi

IPC: G01R31/3177 ,  G01R1/073 ,  G01R23/165 ,  G01R25/04 ,  G01R31/317 ,  G01R31/3183 ,  G04F10/00

CPC classification number: G01R31/3177 ,  G01R1/07314 ,  G01R23/165 ,  G01R25/04 ,  G01R31/31713 ,  G01R31/31715 ,  G01R31/31724 ,  G01R31/31725 ,  G01R31/318328 ,  G04F10/005

Abstract: Disclosed is a fan-out buffer which includes a first channel that includes a first delay circuit adjusting a first delay time of a calibration test signal depending on a first delay control signal, a second channel that includes a second delay circuit adjusting a second delay time of the calibration test signal depending on a second delay control signal, a first edge-to-pulse converter that detects a first edge included in a first time domain reflectometry (TDR) waveform of an output terminal of the first channel and generates a first start pulse signal including a first pulse, a second edge-to-pulse converter that generates a second start pulse signal including a second pulse, a stop pulse signal generator that generates a stop pulse signal including a first stop pulse, and a first delay control signal generator that calculates a phase difference generates the first delay control signal.

公开(公告)号：US11704396B2

公开(公告)日：2023-07-18

申请号：US17016519

申请日：2020-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngil Kim ,  Junhong Kim ,  Eunkyung Hwangbo ,  Hyunsik Ki ,  Sanghoon Lee ,  Honghoon Jang ,  Hyeonhun Jung ,  Youngsuk Jo

IPC: H04L29/06 ,  G06F21/32 ,  H04W4/80 ,  G07C9/26 ,  G06F21/35

CPC classification number: G06F21/32 ,  G06F21/35 ,  G07C9/26 ,  H04W4/80 ,  G06F2221/2117

Abstract: According to certain embodiments, a vehicle electronic device comprises a transceiver configured to communicate with a mobile device; and at least one processor configured to generate first authentication information, control the transceiver to transmit the first authentication information to a registered mobile device, control the transceiver to send a request for authentication to the mobile device via a first communication connection, and perform authentication based on whether or not the processor receives second authentication information from the mobile device that corresponds to the first authentication information, wherein the first communication connection directly communicates with the mobile device.

公开(公告)号：US20230163088A1

公开(公告)日：2023-05-25

申请号：US18151622

申请日：2023-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyuekjae Lee ,  Jongho Lee ,  Jihoon Kim ,  Taehun Kim ,  Sangcheon Park ,  Jinkyeong Seol ,  Sanghoon Lee

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L24/06 ,  H01L25/0652 ,  H01L25/18 ,  H01L24/08 ,  H01L24/32 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0655 ,  H01L21/561 ,  H01L25/50 ,  H01L24/94 ,  H01L24/96 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/83099 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2224/32145 ,  H01L2224/08148 ,  H01L2224/08145 ,  H01L2224/05073 ,  H01L2224/05025 ,  H01L2224/05564 ,  H01L2224/05562 ,  H01L2224/08121 ,  H01L2224/06182 ,  H01L2224/13024 ,  H01L2224/08225 ,  H01L2224/32225 ,  H01L2224/92142 ,  H01L2224/8389 ,  H01L2224/80895

Abstract: A semiconductor package includes a first connection structure, a first semiconductor chip on an upper surface of the first connection structure, a first molding layer on the upper surface of the first connection structure and surrounding the first semiconductor chip, a first bond pad on the first semiconductor chip, a first bond insulation layer on the first semiconductor chip and the first molding layer and surrounding the first bond pad, a second bond pad directly contacting the first bond pad, a second bond insulation layer surrounding the second bond pad; and a second semiconductor chip on the second bond pad and the second bond insulation layer.