公开(公告)号：US20160322323A1

公开(公告)日：2016-11-03

申请号：US14983738

申请日：2015-12-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chieh-Lung Lai ,  Lu-Yi Chen ,  Yu-Chuan Chen ,  Chang-Lun Lu

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/05567 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/014 ,  H01L2924/206 ,  H01L2924/01047 ,  H01L2924/00014

Abstract: A substrate structure is provided, which includes a substrate body having a plurality of conductive pads, and a plurality of first conductive bumps and a plurality of second conductive bumps disposed on the conductive pads. Each of the second conductive bumps is less in width than each of the first conductive bumps, and is of a height with respect to the substrate body greater than a height of each of the first conductive bumps with respect to the substrate body. Therefore, the height difference between the first pre-solder layer and the second pre-solder layer after a reflow process can be compensated, and the first conductive bumps and the second conductive bumps thus have a uniform height.

Abstract translation: 提供了一种衬底结构，其包括具有多个导电焊盘的衬底本体，以及设置在导电焊盘上的多个第一导电凸块和多个第二导电凸块。 每个第二导电凸块的宽度小于每个第一导电凸块，并且相对于基板主体的高度大于每个第一导电凸块相对于基板主体的高度。 因此，可以补偿回流处理后的第一预焊锡层和第二预焊锡层之间的高度差，因此第一导电凸块和第二导电凸块具有均匀的高度。

公开(公告)号：US11081415B2

公开(公告)日：2021-08-03

申请号：US16862024

申请日：2020-04-29

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chieh-Lung Lai ,  Cheng-Yi Chen ,  Chun-Hung Lu ,  Mao-Hua Yeh

IPC: H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L23/16

Abstract: The disclosure provides an electronic package and a method of manufacturing the same. The method is characterized by encapsulating an electronic component with a packaging layer and forming on an upper surface of the packaging layer a circuit structure that is electrically connected to the electronic component; and forming a stress-balancing layer on a portion of the lower surface of the packaging layer to balance the stress exerted on the upper and lower surfaces of the packaging layer, thereby reducing the overall package warpage and facilitating the manufacturing process.

公开(公告)号：US20200258802A1

公开(公告)日：2020-08-13

申请号：US16862024

申请日：2020-04-29

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chieh-Lung Lai ,  Cheng-Yi Chen ,  Chun-Hung Lu ,  Mao-Hua Yeh

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/78 ,  H01L23/16

Abstract: The disclosure provides an electronic package and a method of manufacturing the same. The method is characterized by encapsulating an electronic component with a packaging layer and forming on an upper surface of the packaging layer a circuit structure that is electrically connected to the electronic component; and forming a stress-balancing layer on a portion of the lower surface of the packaging layer to balance the stress exerted on the upper and lower surfaces of the packaging layer, thereby reducing the overall package warpage and facilitating the manufacturing process.

公开(公告)号：US10403596B2

公开(公告)日：2019-09-03

申请号：US15949847

申请日：2018-04-10

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsien-Wen Chen ,  Shih-Ching Chen ,  Chieh-Lung Lai

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L21/683 ,  H01L23/31 ,  H01L21/56 ,  H01L23/15

Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.

公开(公告)号：US10403570B2

公开(公告)日：2019-09-03

申请号：US16157430

申请日：2018-10-11

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US10128178B2

公开(公告)日：2018-11-13

申请号：US15258441

申请日：2016-09-07

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US20180233478A1

公开(公告)日：2018-08-16

申请号：US15949847

申请日：2018-04-10

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsien-Wen Chen ,  Shih-Ching Chen ,  Chieh-Lung Lai

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498

CPC classification number: H01L24/81 ,  H01L21/486 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/15 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/13022 ,  H01L2224/13147 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81 ,  H01L2224/81193 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2224/83 ,  H01L2924/00014

Abstract: A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.

公开(公告)号：US20170338173A1

公开(公告)日：2017-11-23

申请号：US15258441

申请日：2016-09-07

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lu-Yi Chen ,  Hung-Yuan Li ,  Chieh-Lung Lai ,  Shih-Liang Peng ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/014 ,  H01L2924/00014

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second surfaces; a metal layer formed on the first surface of the circuit structure; an electronic element disposed on the metal layer; an encapsulant encapsulating the electronic element; a plurality of conductive posts disposed on the second surface of the circuit structure; and an insulating layer encapsulating the conductive posts. The conductive posts of various sizes can be fabricated according to different aspect ratio requirements so as to make end products lighter, thinner, shorter and smaller. The disclosure further provides a method for fabricating the electronic package.

公开(公告)号：US20170256481A1

公开(公告)日：2017-09-07

申请号：US15084762

申请日：2016-03-30

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shih-Ching Chen ,  Shih-Liang Peng ,  Chieh-Lung Lai ,  Jia-Wei Pan ,  Chang-Lun Lu

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L21/4846 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/562 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/15151

Abstract: A semiconductor substrate is provided, including a substrate body having a lateral surface, and a protruding structure extending outward from the lateral surface. The semiconductor substrate distributes stresses generated during a manufacturing process through the protruding structure, and is thus prevented from delamination or being cracked. An electronic package having the semiconductor substrate is also provided.