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公开(公告)号:US20240210497A1
公开(公告)日:2024-06-27
申请号:US18146447
申请日:2022-12-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Daiki Komatsu , Masamitsu Matsuura
CPC classification number: G01R33/077 , H10N52/01 , H10N52/101
Abstract: An integrated circuit (IC) package comprises a semiconductor die having a first surface with a Hall-effect sensor circuit and a second surface. A plurality of through substrate vias (TSV) each having a metal layer extend from the first surface of the semiconductor die to the second surface. The IC package includes a portion of a leadframe having a first set of leads and a second set of leads. The first set of leads provide a field generating current path for directing a magnetic field toward the Hall-effect sensor circuit. The second set of leads are attached to bond pads on the semiconductor die. A first side of an insulator is attached to the leadframe using a die attach material, and a second side of the insulator is attached to the first side of the semiconductor die using a bonding material.
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公开(公告)号:US20200043878A1
公开(公告)日:2020-02-06
申请号:US16053199
申请日:2018-08-02
Applicant: Texas Instruments Incorporated
Inventor: Daiki Komatsu , Makoto Shibuya , Yi Yan , Hau Nguyen , Luu Thanh Nguyen , Anindya Poddar
IPC: H01L23/00 , H01L23/367 , H01L23/498 , H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56 , H01L21/78
Abstract: Described examples provide integrated circuits and methods, including forming a conductive seed layer at least partially above a conductive feature of a wafer, forming a conductive structure on at least a portion of the conductive seed layer, performing a printing process that forms a polymer material on a side of the wafer proximate a side of the conductive structure, curing the deposited polymer material, and attaching a solder ball structure to a side of the conductive structure.
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公开(公告)号:US12230539B2
公开(公告)日:2025-02-18
申请号:US16051590
申请日:2018-08-01
Applicant: Texas Instruments Incorporated
Inventor: Daiki Komatsu , Makoto Shibuya
IPC: H01L23/52 , H01L21/768 , H01L23/00 , H01L23/49 , H01L23/522 , H01L23/532 , H01L23/538
Abstract: Disclosed examples provide methods that include forming a conductive structure at least partially above a conductive feature of a wafer, attaching a solder ball structure to a side of the conductive structure, and thereafter forming a repassivation layer on a side of the wafer proximate the side of the conductive structure. Further examples provide microelectronic devices and integrated circuits that include a conductive structure coupled with a conductive feature of a metallization structure, a solder ball structure connected to the conductive structure, and a printed repassivation layer disposed on the side of the metallization structure proximate a side of the conductive structure.
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公开(公告)号:US20240363465A1
公开(公告)日:2024-10-31
申请号:US18309546
申请日:2023-04-28
Applicant: Texas Instruments Incorporated
Inventor: Anindya Poddar , Daiki Komatsu , Hau Nguyen
IPC: H01L23/31 , H01L21/56 , H01L21/78 , H01L23/00 , H01L23/495
CPC classification number: H01L23/3135 , H01L21/561 , H01L21/78 , H01L23/49513 , H01L24/05 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/92 , H01L21/568 , H01L23/291 , H01L23/293 , H01L2224/05558 , H01L2224/05686 , H01L2224/0569 , H01L2224/32245 , H01L2224/48091 , H01L2224/48108 , H01L2224/48245 , H01L2224/49173 , H01L2224/73265 , H01L2224/92247 , H01L2924/05442 , H01L2924/0695 , H01L2924/07025
Abstract: An electronic device includes a semiconductor die, a die attach pad, an adhesive, a conductive lead, and a package structure, where the semiconductor die has opposite first and second sides, a conductive terminal on the second side, and an electrical isolation coating layer that extends on the first side, the adhesive adheres the first side of the semiconductor die to the die attach pad, the conductive lead is electrically coupled to the conductive terminal of the semiconductor die, and the package structure encloses at least a portion of the semiconductor die.
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公开(公告)号:US20240290676A1
公开(公告)日:2024-08-29
申请号:US18174039
申请日:2023-02-24
Applicant: Texas Instruments Incorporated
Inventor: Masamitsu Matsuura , Makoto Shibuya , Daiki Komatsu , Kengo Aoya
IPC: H01L23/31 , H01L21/56 , H01L23/367 , H01L23/495 , H01L23/498 , H01L25/16
CPC classification number: H01L23/3135 , H01L21/56 , H01L23/367 , H01L23/49555 , H01L23/49562 , H01L23/49811 , H01L25/16 , H01L23/49589 , H01L23/49833 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/06051 , H01L2224/2919 , H01L2224/32227 , H01L2224/32245 , H01L2224/40137 , H01L2224/40475 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45664 , H01L2224/48091 , H01L2224/48106 , H01L2224/48108 , H01L2224/48175 , H01L2224/48229 , H01L2224/49113 , H01L2224/49175 , H01L2224/73221 , H01L2224/73253 , H01L2224/73265 , H01L2924/0665 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/13091
Abstract: A microelectronic device includes one or more electronic components attached to a package substrate which has an exposed surface to provide an area for mounting a heatsink. The microelectronic device includes one or more leads that are electrically connected to the electronic component. The lead extends away from the exposed surface of the package substrate. The microelectronic device includes a shielding dielectric material that laterally surrounds the lead and extends over the lead between the lead and the exposed surface of the package substrate. An electronic system includes the microelectronic device and a circuit board electrically connected to the lead. The electronic system also includes a heatsink attached to the exposed surface of the package substrate.
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公开(公告)号:US20230317568A1
公开(公告)日:2023-10-05
申请号:US17710077
申请日:2022-03-31
Applicant: Texas Instruments Incorporated
Inventor: Daiki Komatsu , Anindya Poddar , Hau Nguyen
IPC: H01L23/495 , H01L23/00 , H01L23/31 , H01L21/56 , H01L21/78
CPC classification number: H01L23/49513 , H01L24/32 , H01L23/3107 , H01L24/29 , H01L24/48 , H01L24/73 , H01L24/92 , H01L21/56 , H01L21/78 , H01L2224/32245 , H01L2224/2919 , H01L2224/48221 , H01L2224/73265 , H01L2224/92247
Abstract: An integrated circuit package includes a die attach pad (DAP) having a top surface and a layer of insulating material applied to the top surface of the DAP. A silicon-on-insulator (SOI) device is mounted on the insulating material using a die attach paste or film. A plurality of leads are coupled to the SOI device using bond wires. A mold compound covers at least a portion of the DAP and the SOI device. The insulating material may be polyimide or polyamide-imide that has been inkjet printed or screen printed on the DAP. The insulating material may be a parylene material that is applied to the top surface of the DAP using chemical vapor deposition. The insulating material has a thickness of 1-25 um and has a breakdown voltage of approximately 250V/um.
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公开(公告)号:US11062980B2
公开(公告)日:2021-07-13
申请号:US15858962
申请日:2017-12-29
Applicant: Texas Instruments Incorporated
Inventor: Makoto Shibuya , Daiki Komatsu
IPC: H01L23/495 , H01L23/31 , H01L21/56 , H01L21/48 , H01L23/00 , H01L23/498
Abstract: Leadframes, integrated circuit packaging with wettable flanks, and methods of manufacturing the same are disclosed. An example packaged device having a leadframe includes a die pad and a lead spaced apart from the die pad. The lead has a proximal end adjacent the die pad and a distal end extending away from the die pad. The lead has a thickness at the distal end that is less than a full thickness of the leadframe between a first outer surface on a die attach side of the leadframe and a second outer surface on a mounting side of the leadframe.
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公开(公告)号:US20180366396A1
公开(公告)日:2018-12-20
申请号:US15627141
申请日:2017-06-19
Applicant: Texas Instruments Incorporated
Inventor: Daiki Komatsu , Makoto Shibuya
Abstract: An integrated circuit (IC) package includes an encapsulation package that contains an integrated circuit die attached to a lead frame. A set of contacts is formed on the package that each have an exposed contact sidewall surface and an exposed contact lower surface. A protective layer of solder wettable material covers each contact sidewall surface.
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公开(公告)号:US12259445B2
公开(公告)日:2025-03-25
申请号:US18146447
申请日:2022-12-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Daiki Komatsu , Masamitsu Matsuura
Abstract: An integrated circuit (IC) package comprises a semiconductor die having a first surface with a Hall-effect sensor circuit and a second surface. A plurality of through substrate vias (TSV) each having a metal layer extend from the first surface of the semiconductor die to the second surface. The IC package includes a portion of a leadframe having a first set of leads and a second set of leads. The first set of leads provide a field generating current path for directing a magnetic field toward the Hall-effect sensor circuit. The second set of leads are attached to bond pads on the semiconductor die. A first side of an insulator is attached to the leadframe using a die attach material, and a second side of the insulator is attached to the first side of the semiconductor die using a bonding material.
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公开(公告)号:US20240395731A1
公开(公告)日:2024-11-28
申请号:US18321192
申请日:2023-05-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Masamitsu Matsuura , Anindya Poddar , Daiki Komatsu , Hau Thanh Nguyen , Patrick Francis Thompson
IPC: H01L23/00 , H01L21/027 , H01L21/56 , H01L23/495
Abstract: An electronic device includes a leadframe having a die pad and leads. A die that includes an active layer is attached to the die pad. A reinforcement layer is disposed on the active layer and wire bonds are attached from the active layer of the die to the leads. A mold compound encapsulates the die, the reinforcement layer, and the wire bonds.
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