公开(公告)号：US11728215B2

公开(公告)日：2023-08-15

申请号：US17333090

申请日：2021-05-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shich-Chang Suen ,  Kei-Wei Chen ,  Liang-Guang Chen

IPC: H01L21/70 ,  H01L21/768 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/285 ,  H01L21/033 ,  H01L29/78 ,  H01L23/522 ,  H01L21/28 ,  H01L21/3105 ,  H01L21/8238 ,  H01L21/3213 ,  H01L21/32

CPC classification number: H01L21/76897 ,  H01L21/0217 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02227 ,  H01L21/02271 ,  H01L21/02301 ,  H01L21/02312 ,  H01L21/0337 ,  H01L21/28247 ,  H01L21/28525 ,  H01L21/28568 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/823821 ,  H01L23/5226 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L21/32 ,  H01L21/32134 ,  H01L21/32135 ,  H01L29/7848

Abstract: A method includes forming a first gate structure over a substrate, where the first gate structure is surrounded by a first dielectric layer; and forming a mask structure over the first gate structure and over the first dielectric layer, where forming the mask structure includes selectively forming a first capping layer over an upper surface of the first gate structure; and forming a second dielectric layer around the first capping layer. The method further includes forming a patterned dielectric layer over the mask structure, the patterned dielectric layer exposing a portion of the mask structure; removing the exposed portion of the mask structure and a portion of the first dielectric layer underlying the exposed portion of the mask structure, thereby forming a recess exposing a source/drain region adjacent to the first gate structure; and filling the recess with a conductive material.

公开(公告)号：US09553161B2

公开(公告)日：2017-01-24

申请号：US14746061

申请日：2015-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Jen Liu ,  Li-Chieh Wu ,  Shich-Chang Suen ,  Liang-Guang Chen

IPC: H01L21/8234 ,  H01L29/51 ,  H01L29/423 ,  H01L29/49 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/28 ,  H01L21/285 ,  H01L21/321 ,  H01L29/40

CPC classification number: H01L29/517 ,  H01L21/02068 ,  H01L21/02096 ,  H01L21/02244 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28229 ,  H01L21/28518 ,  H01L21/3212 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823842 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate and forming a metal gate stack including a metal gate electrode over the semiconductor substrate. The method also includes applying an oxidizing solution containing an oxidizing agent over the metal gate electrode to oxidize the metal gate electrode to form a metal oxide layer on the metal gate electrode.

Abstract translation: 提供一种形成半导体器件的方法。 该方法包括提供半导体衬底并在半导体衬底上形成包括金属栅电极的金属栅叠层。 该方法还包括在金属栅电极上施加含有氧化剂的氧化溶液以氧化金属栅电极，以在金属栅电极上形成金属氧化物层。

公开(公告)号：US09076766B2

公开(公告)日：2015-07-07

申请号：US13917145

申请日：2013-06-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chi-Jen Liu ,  Li-Chieh Wu ,  Shich-Chang Suen ,  Liang-Guang Chen

IPC: H01L21/8234 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/517 ,  H01L21/02068 ,  H01L21/02096 ,  H01L21/02244 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28229 ,  H01L21/28518 ,  H01L21/3212 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823842 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 Å to about 40 Å. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion.

Abstract translation: 提供了用于形成半导体器件的机构的实施例。 半导体器件包括在半导体衬底上形成有金属栅堆叠的半导体衬底，并且金属栅叠层包括金属栅电极。 半导体器件还包括形成在金属栅叠层上并与金属栅电极直接接触的金属氧化物层，并且金属氧化物层的厚度在大约至大约的范围内。 金属氧化物层具有由金属栅电极的氧化材料制成的第一部分，并且具有由不同于第一部分的材料制成的第二部分。