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    Method for manufacturing a microelectromechanical systems (MEMS) device with different electrical potentials and an etch stop
    11.
    发明授权
    Method for manufacturing a microelectromechanical systems (MEMS) device with different electrical potentials and an etch stop 有权
    用于制造具有不同电位和蚀刻停止的微机电系统（MEMS）器件的方法

    公开(公告)号：US09221674B1

    公开(公告)日：2015-12-29

    申请号：US14450505

    申请日：2014-08-04

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Kuei-Sung Chang ,  Chun-Wen Cheng

    IPC: H01L21/00 ,  B81B7/00 ,  B81C1/00

    CPC classification number: B81B7/007 ,  B81B2203/0163 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C1/00166 ,  B81C1/00301 ,  B81C1/00801 ,  B81C2203/0118

    Abstract: A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.

    Abstract translation: 提供了一种用于微机电系统（MEMS）装置的半导体结构。 第一衬底区域包括布置在第一衬底区域的顶表面上方的电隔离层。 第二衬底区域布置在电隔离层上方并且包括布置在第二衬底区域内的MEMS器件结构。 MEMS器件结构包括固定质量和检验质量。 电介质区域布置在固定质量块周围的电隔离层的上方。 固定质量电极布置在电介质区周围，并且延伸穿过第二衬底区域到电隔离层。 隔离电极通过第二衬底区域和电隔离层延伸到与固定质量电极相反的一侧的第一衬底区域。 还提供了形成半导体结构的方法。

    Wafer level sealing methods with different vacuum levels for MEMS sensors
    12.
    发明授权
    Wafer level sealing methods with different vacuum levels for MEMS sensors 有权
    MEMS传感器的不同真空度的晶圆级密封方法

    公开(公告)号：US09035451B2

    公开(公告)日：2015-05-19

    申请号：US14041298

    申请日：2013-09-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Kuei-Sung Chang ,  Chun-Wen Cheng

    IPC: B81B7/00 ,  B81B3/00 ,  H01L29/84 ,  H01L21/02 ,  B81C1/00

    CPC classification number: B81C1/00293 ,  B81B3/0018 ,  B81B3/0059 ,  B81B3/0067 ,  B81B7/0032 ,  B81B7/0041 ,  B81B7/02 ,  B81C1/00158 ,  B81C2203/0145 ,  H01L29/84

    Abstract: The present disclosure relates to a method of forming a plurality of MEMs device having a plurality of cavities with different pressures on a wafer package system, and an associated apparatus. In some embodiments, the method is performed by providing a work-piece having a plurality of microelectromechanical system (MEMs) devices. A cap wafer is bonded onto the work-piece in a first ambient environment having a first pressure. The bonding forms a plurality of cavities abutting the plurality of MEMs devices, which are held at the first pressure. One or more openings are formed in one or more of the plurality of cavities leading to a gas flow path that could be held at a pressure level different from the first pressure. The one or more openings in the one or more of the plurality of cavities are then sealed in a different ambient environment having a different pressure, thereby causing the one or more of the plurality of cavities to be held at the different pressure.

    Abstract translation: 本公开涉及一种在晶片封装系统上形成具有多个具有不同压力的空腔的多个MEM器件的方法，以及相关联的装置。 在一些实施例中，该方法通过提供具有多个微机电系统（MEM）装置的工件来执行。 帽盖晶片在具有第一压力的第一周围环境中结合到工件上。 接合形成与多个保持在第一压力下的多个MEM装置邻接的多个空腔。 一个或多个开口形成在多个空腔中的一个或多个空腔中，导致可以保持在不同于第一压力的压力水平的气体流动路径。 然后将多个空腔中的一个或多个中的一个或多个开口密封在具有不同压力的不同周围环境中，从而使多个空腔中的一个或多个保持在不同的压力。

    Semiconductor structure for MEMS device
    14.
    发明授权
    Semiconductor structure for MEMS device 有权

    公开(公告)号：US11312623B2

    公开(公告)日：2022-04-26

    申请号：US16944399

    申请日：2020-07-31

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng ,  Jung-Huei Peng

    IPC: H01L21/00 ,  B81C1/00

    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.

    Method and Structure for CMOS-MEMS Thin Film Encapsulation
    15.
    发明申请
    Method and Structure for CMOS-MEMS Thin Film Encapsulation 审中-公开

    公开(公告)号：US20200317506A1

    公开(公告)日：2020-10-08

    申请号：US16908243

    申请日：2020-06-22

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

    IPC: B81B7/00 ,  B81C1/00

    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

    Multi-pressure MEMS package
    16.
    发明授权
    Multi-pressure MEMS package 有权

    公开(公告)号：US10273144B2

    公开(公告)日：2019-04-30

    申请号：US15626764

    申请日：2017-06-19

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng ,  Kuei-Sung Chang ,  Jung-Huei Peng

    IPC: H01L29/82 ,  B81B3/00 ,  B81B7/02

    Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.

    SEMICONDUCTOR STRUCTURE FOR MEMS DEVICE
    17.
    发明申请
    SEMICONDUCTOR STRUCTURE FOR MEMS DEVICE 审中-公开

    公开(公告)号：US20190112183A1

    公开(公告)日：2019-04-18

    申请号：US16211681

    申请日：2018-12-06

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng ,  Jung-Huei Peng

    IPC: B81C1/00

    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.

    SEMICONDUCTOR STRUCTURE FOR MEMS DEVICE
    19.
    发明申请
    SEMICONDUCTOR STRUCTURE FOR MEMS DEVICE 审中-公开

    公开(公告)号：US20170369308A1

    公开(公告)日：2017-12-28

    申请号：US15193410

    申请日：2016-06-27

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng ,  Jung-Huei Peng

    IPC: B81C1/00

    CPC classification number: B81C1/00238 ,  B81C2203/0785

    Abstract: The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.

    WAFER LEVEL SEALING METHODS WITH DIFFERENT VACUUM LEVELS FOR MEMS SENSORS
    20.
    发明申请
    WAFER LEVEL SEALING METHODS WITH DIFFERENT VACUUM LEVELS FOR MEMS SENSORS 有权
    用于MEMS传感器的不同真空度的水平密封方法

    公开(公告)号：US20150091153A1

    公开(公告)日：2015-04-02

    申请号：US14041298

    申请日：2013-09-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Kuei-Sung Chang ,  Chun-Wen Cheng

    IPC: B81C1/00 ,  B81B7/00

    CPC classification number: B81C1/00293 ,  B81B3/0018 ,  B81B3/0059 ,  B81B3/0067 ,  B81B7/0032 ,  B81B7/0041 ,  B81B7/02 ,  B81C1/00158 ,  B81C2203/0145 ,  H01L29/84

    Abstract: The present disclosure relates to a method of forming a plurality of MEMs device having a plurality of cavities with different pressures on a wafer package system, and an associated apparatus. In some embodiments, the method is performed by providing a work-piece having a plurality of microelectromechanical system (MEMs) devices. A cap wafer is bonded onto the work-piece in a first ambient environment having a first pressure. The bonding forms a plurality of cavities abutting the plurality of MEMs devices, which are held at the first pressure. One or more openings are formed in one or more of the plurality of cavities leading to a gas flow path that could be held at a pressure level different from the first pressure. The one or more openings in the one or more of the plurality of cavities are then sealed in a different ambient environment having a different pressure, thereby causing the one or more of the plurality of cavities to be held at the different pressure.

    Abstract translation: 本公开涉及一种在晶片封装系统上形成具有多个具有不同压力的空腔的多个MEM器件的方法，以及相关联的装置。 在一些实施例中，该方法通过提供具有多个微机电系统（MEM）装置的工件来执行。 帽盖晶片在具有第一压力的第一周围环境中结合到工件上。 接合形成与多个保持在第一压力下的多个MEM装置邻接的多个空腔。 一个或多个开口形成在多个空腔中的一个或多个空腔中，导致可以保持在不同于第一压力的压力水平的气体流动路径。 然后将多个空腔中的一个或多个中的一个或多个开口密封在具有不同压力的不同周围环境中，从而使多个空腔中的一个或多个保持在不同的压力。

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