公开(公告)号：US20160032445A1

公开(公告)日：2016-02-04

申请号：US14799650

申请日：2015-07-15

Applicant: Tokyo Electron Limited

Inventor： Yoshihide KIHARA ,  Masanobu HONDA ,  Toru HISAMATSU

IPC: C23C14/34 ,  H01J37/34 ,  C23C14/06

CPC classification number: C23C14/34 ,  C23C14/0021 ,  C23C14/0036 ,  C23C14/06 ,  C23C14/0605 ,  C23C14/0694 ,  C23C14/3414 ,  C23C14/3435 ,  C23C14/345 ,  C23C16/30 ,  C23C16/44 ,  C23C16/448 ,  C23C16/505 ,  C23C16/509 ,  H01J37/32568 ,  H01J37/32577 ,  H01J37/3414 ,  H01J37/3417 ,  H01J37/3426 ,  H01J37/3432 ,  H01J37/3438 ,  H01J37/3491

Abstract: A plasma processing apparatus includes a first electrode, a second electrode disposed to face the first electrode, a chamber, a first high-frequency power supply, a direct-current power supply, and a gas supply source. The plasma processing apparatus generates first plasma to form a film of a reaction product on the second electrode by causing the first high-frequency power supply to supply first high-frequency power to the second electrode and causing the gas supply source to supply a first gas into the chamber; and generates second plasma to sputter the film of the reaction product by causing the first high-frequency power supply to supply the first high-frequency power to the second electrode, causing the direct-current power supply to supply direct-current power to the second electrode, and causing the gas supply source to supply a second gas into the chamber.

Abstract translation: 等离子体处理装置包括第一电极，与第一电极相对设置的第二电极，室，第一高频电源，直流电源和气体供给源。 等离子体处理装置通过使第一高频电源向第二电极提供第一高频电力并且使气体供给源提供第一气体而产生第一等离子体以在第二电极上形成反应产物的膜 进入房间 并通过使第一高频电源向第二电极提供第一高频电力而产生第二等离子体以溅射反应产物的膜，从而使直流电源向第二高频电源提供直流电力 电极，并且使气体供应源将第二气体供应到室中。

公开(公告)号：US20230035391A1

公开(公告)日：2023-02-02

申请号：US17961731

申请日：2022-10-07

Applicant: Tokyo Electron Limited

Inventor： Toru HISAMATSU ,  Masanobu HONDA ,  Yoshihide KIHARA

IPC: H01L21/311 ,  H01L21/027 ,  H01L21/67 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/033

Abstract: A method for processing a substrate in a plasma chamber is provided. The method includes providing a substrate on which as underlying layer to be etched and a mask are formed. The method further includes forming a protective film on the mask. The method further includes performing as anisotropic deposition to selectively form a deposition layer on a top portion of the mask.

公开(公告)号：US20210320011A1

公开(公告)日：2021-10-14

申请号：US17357049

申请日：2021-06-24

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU ,  Kensuke TANIGUCHI ,  Yoshinari HATAZAKI

IPC: H01L21/3065 ,  H01J37/32

Abstract: A plasma processing apparatus which forms a first film on a pattern formed on a substrate having dense and coarse areas, and then performs sputtering or etching on the first film.

公开(公告)号：US20200251344A1

公开(公告)日：2020-08-06

申请号：US16262994

申请日：2019-01-31

Applicant: Tokyo Electron Limited

Inventor： Toru HISAMATSU ,  Masanobu HONDA ,  Yoshihide KIHARA

IPC: H01L21/311 ,  H01L21/027 ,  H01L21/033 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/67

Abstract: A method for processing a substrate in a plasma chamber is provided. The method includes providing a substrate on which an underlying layer to be etched and a mask are formed. The method further includes forming a protective film on the mask. The method further includes performing an anisotropic deposition to selectively form a deposition layer on a top portion of the mask.

公开(公告)号：US20200243298A1

公开(公告)日：2020-07-30

申请号：US16775960

申请日：2020-01-29

Applicant: TOKYO ELECTRON LIMITED

Inventor： Daisuke NISHIDE ,  Toru HISAMATSU ,  Shinya ISHIKAWA

IPC: H01J37/18 ,  C23C16/505 ,  H01J37/32

Abstract: An etching method includes: providing a substrate having a film and a patterned mask on the film; forming a silicon-containing layer including silicon, carbon, and nitrogen on the substrate using a precursor gas containing silicon; and performing a plasma etching on the film. The substrate is placed under a depressurized environment for a time period from a start time point of the step of forming the silicon-containing layer on the substrate to an end time point of the step of performing the plasma etching on the film.

公开(公告)号：US20200075343A1

公开(公告)日：2020-03-05

申请号：US16678741

申请日：2019-11-08

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU ,  Masanobu HONDA

IPC: H01L21/311 ,  H01L21/66 ,  H01L21/324 ,  H01L21/033

Abstract: In a method according to an embodiment, before etching a target layer of a wafer, a main surface of the target layer is divided into a plurality of areas. A difference value between a groove width of a mask and a reference value of the groove width is calculated for each of the plurality of areas, a temperature of the target layer is adjusted by using correspondence data indicating correspondence between a temperature of the target layer and a film thickness of a formed film. Then, a film is formed on the mask for each atom layer, and a film having a film thickness corresponding to the difference value is formed on the mask to correct the groove width in each of the plurality of areas to the reference value.

公开(公告)号：US20190019689A1

公开(公告)日：2019-01-17

申请号：US16135178

申请日：2018-09-19

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU ,  Masanobu HONDA

IPC: H01L21/311 ,  H01L21/033 ,  H01L21/66 ,  H01L21/324

Abstract: In a method according to an embodiment, before etching a target layer of a wafer, a main surface of the target layer is divided into a plurality of areas. A difference value between a groove width of a mask and a reference value of the groove width is calculated for each of the plurality of areas, a temperature of the target layer is adjusted by using correspondence data indicating correspondence between a temperature of the target layer and a film thickness of a formed film. Then, a film is formed on the mask for each atom layer, and a film having a film thickness corresponding to the difference value is formed on the mask to correct the groove width in each of the plurality of areas to the reference value.

公开(公告)号：US20180247827A1

公开(公告)日：2018-08-30

申请号：US15903466

申请日：2018-02-23

Applicant: Tokyo Electron Limited

Inventor： Michiko NAKAYA ,  Masanobu HONDA ,  Toru HISAMATSU ,  Masahiro TABATA

IPC: H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/02076 ,  H01L21/32138 ,  H01L21/76814

Abstract: A semiconductor manufacturing method includes a first process of etching an insulating film over a conductive layer of an object into a pattern of a mask, and exposing the conductive layer to a recessed portion formed in the insulating film, and a second process of forming an organic film in the recessed portion of the insulating film to which the conductive layer is exposed, the second process including, maintaining a chamber at a predetermined pressure, cooling a stage to −20° C. or less, and placing the object on the stage, supplying a gas including a gas containing a low vapor pressure material to the chamber, and generating plasma from the gas including the gas containing the low vapor pressure material, and causing precursors generated from the low vapor pressure material and included in the plasma to be deposited in the recessed portion such that the organic film is formed.

公开(公告)号：US20180158684A1

公开(公告)日：2018-06-07

申请号：US15873189

申请日：2018-01-17

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yoshihide KIHARA ,  Toru HISAMATSU

IPC: H01L21/033 ,  H01L21/3213 ,  C23C16/40 ,  C23C16/455 ,  H01L21/02 ,  H01L21/027 ,  H01L21/308 ,  H01L21/311

Abstract: A controllability of a size of a mask can be improved in a multi-patterning method. A process of forming a silicon oxide film on a first mask and an antireflection film is performed. In this process, plasma of a first gas including a silicon halide gas and plasma of a second gas including an oxygen gas are alternately generated. Then, a region of the silicon oxide film is removed such that only a region along a side wall of the first mask is left, and then, the first mask is removed and the antireflection film and an organic film is etched.

公开(公告)号：US20240282578A1

公开(公告)日：2024-08-22

申请号：US18626719

申请日：2024-04-04

Applicant: Tokyo Electron Limited

Inventor： Toru HISAMATSU ,  Takayuki KATSUNUMA ,  Shinya ISHIKAWA ,  Yoshihide KIHARA ,  Masanobu HONDA

IPC: H01L21/033 ,  C23C16/04 ,  H01L21/311

CPC classification number: H01L21/0337 ,  H01L21/31144 ,  C23C16/042

Abstract: A substrate processing apparatus includes a chamber; a substrate support disposed in the chamber; a gas supply that supplies a gas into the chamber; and a controller that controls an overall operation of the substrate processing apparatus. The controller executes a process including: (a) placing a substrate on the substrate support, the substrate including an etching layer and a patterned mask on the etching layer; (b) forming a film on the patterned mask; (c) forming a reaction layer on the film; and (d) removing the reaction layer by applying energy to the reaction layer. In the step (c) a temperature of the substrate is set according to a thickness of the reaction layer to be formed.