公开(公告)号：US20060076597A1

公开(公告)日：2006-04-13

申请号：US11235866

申请日：2005-09-26

申请人： Vishnu Agarwal ,  Garo Derderian ,  Gurtej Sandhu ,  Weimin Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

发明人： Vishnu Agarwal ,  Garo Derderian ,  Gurtej Sandhu ,  Weimin Li ,  Mark Visokay ,  Cem Basceri ,  Sam Yang

IPC分类号： H01L29/94

CPC分类号： H01L28/84 ,  H01L21/02183 ,  H01L21/02197 ,  H01L21/31637 ,  H01L28/55 ,  H01L28/65

摘要： Capacitors having increased capacitance include an enhanced-surface-area (rough-surfaced) electrically conductive layer or other layers that are compatible with the high-dielectric constant materials. In one approach, an enhanced-surface-area electrically conductive layer for such capacitors is formed by processing a ruthenium oxide layer at high temperature at or above 500° C. and low pressure 75 torr or below, most desirably 5 torr or below, to produce a roughened ruthenium layer having a textured surface with a mean feature size of at least about 100 Angstroms. The initial ruthenium oxide layer may be provided by chemical vapor deposition techniques or sputtering techniques or the like. The layer may be formed over an underlying electrically conductive layer. The processing may be performed in an inert ambient or in a reducing ambient. A nitrogen-supplying ambient or nitrogen-supplying reducing ambient may be used during the processing or afterwards to passivate the ruthenium for improved compatibility with high-dielectric-constant dielectric materials. Processing in an oxidizing ambient may also be performed to passivate the roughened layer. The roughened layer of ruthenium may be used to form an enhanced-surface-area electrically conductive layer. The resulting enhanced-surface-area electrically conductive layer may form a plate of a storage capacitor in an integrated circuit, such as in a memory cell of a DRAM or the like. In another approach, a tungsten nitride layer is provided as an first electrode of such a capacitor. The capacitor, or at least the tungsten nitride layer, is annealed to increase the capacitance of the capacitor.

公开(公告)号：US20060035471A1

公开(公告)日：2006-02-16

申请号：US11204509

申请日：2005-08-16

申请人： Chris Hill ,  Weimin Li ,  Gurtej Sandhu

发明人： Chris Hill ,  Weimin Li ,  Gurtej Sandhu

IPC分类号： H01L21/336

CPC分类号： C23C16/45523 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02129 ,  H01L21/02271 ,  H01L21/31625

摘要： A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.

摘要翻译： 衬底位于沉积室内。 将至少两种气体前体进料到共同包含硅的室，包含氧和掺杂剂的氧化剂成为沉积的掺杂二氧化硅的一部分。 进料至少在两个不同的时间段内并且在有效沉积掺杂的二氧化硅层的条件下在基板上。 时间段和条件的特征在于一段时间，其中一种所述包含所述掺杂剂的气态前体在基本上不流动任何所述氧化剂前体的情况下流动到所述室。 在一个实施方案中，与沉积在限定所述间隙的衬底结构上的任何掺杂二氧化硅相比，时间段和条件有效地至少在衬底上的至少一些间隙内沉积更大量的掺杂二氧化硅。

公开(公告)号：US20060001175A1

公开(公告)日：2006-01-05

申请号：US11215671

申请日：2005-08-30

申请人： Gurtej Sandhu ,  Zhiping Yin ,  Weimin Li

发明人： Gurtej Sandhu ,  Zhiping Yin ,  Weimin Li

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/3081 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/10852

摘要： A masking structure having multiple layers is formed. The masking structure includes an amorphous carbon layer and a cap layer formed over the amorphous carbon layer. The amorphous carbon layer includes transparent amorphous carbon. The cap layer includes non-oxide materials. The masking structure may be used as a mask in an etching process during fabrication of semiconductor devices.

摘要翻译： 形成具有多层的掩模结构。 掩模结构包括无定形碳层和形成在无定形碳层上的盖层。 无定形碳层包括透明无定形碳。 盖层包括非氧化物材料。 在半导体器件的制造期间，掩模结构可以用作蚀刻工艺中的掩模。

公开(公告)号：US20050223978A1

公开(公告)日：2005-10-13

申请号：US11146953

申请日：2005-06-07

申请人： Weimin Li ,  Sam Yang

发明人： Weimin Li ,  Sam Yang

IPC分类号： B05C11/00 ,  C23C16/18 ,  H01L21/02

CPC分类号： C23C16/45523 ,  C23C16/18 ,  H01L28/65

摘要： A technique for more efficiently forming conductive elements, such as conductive layers and electrodes, using chemical vapor deposition. A conductive precursor gas, such as a platinum precursor gas, having organic compounds to improve step coverage is introduced into a chemical vapor deposition chamber. A reactant is also introduced into the chamber that reacts with residue organic compounds on the conductive element so as to remove the organic compounds from the nucleating sites to thereby permit more efficient subsequent chemical vapor deposition of conductive elements.

摘要翻译： 一种使用化学气相沉积更有效地形成诸如导电层和电极的导电元件的技术。 将具有改善步骤覆盖度的有机化合物的导电前体气体，例如铂前体气体引入化学气相沉积室。 反应物也被引入室中，与导电元件上的残余有机化合物反应，以便从成核位置除去有机化合物，从而允许更有效的后续化学气相沉积导电元件。

公开(公告)号：US06835995B2

公开(公告)日：2004-12-28

申请号：US10033656

申请日：2001-12-27

申请人： Weimin Li

发明人： Weimin Li

IPC分类号： H01L2900

CPC分类号： H01L21/02126 ,  C23C16/30 ,  C23C16/56 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/31612 ,  H01L21/76801

摘要： A method is provided for forming a material with a low dielectric constant, suitable for electrical isolation in integrated circuits. The material and method of manufacture has particular use as an interlevel dielectric between metal lines in integrated circuits. In a disclosed embodiment, methylsilane is reacted with hydrogen peroxide to deposit a silicon hydroxide layer incorporating carbon. The layer is then treated by exposure to a plasma containing oxygen, and annealing the layer at a temperature of higher than about 450° C. or higher.

摘要翻译： 提供了一种形成具有低介电常数的材料的方法，适用于集成电路中的电隔离。 该材料和制造方法特别用作集成电路中的金属线之间的层间电介质。 在公开的实施方案中，甲基硅烷与过氧化氢反应以沉积包含碳的氢氧化硅层。 然后通过暴露于含有氧的等离子体处理该层，并在高于约450℃或更高的温度下退火该层。

公开(公告)号：US06719919B1

公开(公告)日：2004-04-13

申请号：US09641826

申请日：2000-08-17

申请人： Weimin Li ,  Zhiping Yin

发明人： Weimin Li ,  Zhiping Yin

IPC分类号： C01B33029

CPC分类号： H01L21/76834 ,  H01L21/3185 ,  H01L21/76801 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In one aspect, the invention encompasses a semiconductor processing method wherein a conductive copper-containing material is formed over a semiconductive substrate and a second material is formed proximate the conductive material. A barrier layer is formed between the conductive material and the second material. The barrier layer comprises a compound having silicon chemically bonded to both nitrogen and an organic material. In another aspect, the invention encompasses a composition of matter comprising silicon chemically bonded to both nitrogen and an organic material. The nitrogen is not bonded to carbon. In yet another aspect, the invention encompasses a semiconductor processing method. A semiconductive substrate is provided and a layer is formed over the semiconductive substrate. The layer comprises a compound having silicon chemically bonded to both nitrogen and an organic material.

摘要翻译： 一方面，本发明包括一种半导体处理方法，其中在半导体衬底上形成导电含铜材料，并且在导电材料附近形成第二材料。 在导电材料和第二材料之间形成阻挡层。 阻挡层包括具有与氮和有机材料化学键合的硅的化合物。 在另一方面，本发明包括包含与氮和有机材料化学键合的硅的物质组合物。 氮不与碳结合。 另一方面，本发明包括半导体处理方法。 提供半导体衬底并且在半导体衬底上形成层。 该层包括具有与氮和有机材料化学键合的硅的化合物。

公开(公告)号：US06576538B2

公开(公告)日：2003-06-10

申请号：US09945567

申请日：2001-08-30

申请人： Weimin Li ,  Sam Yang

发明人： Weimin Li ,  Sam Yang

IPC分类号： H01L2144

CPC分类号： C23C16/45523 ,  C23C16/18 ,  H01L28/65

摘要： A technique for more efficiently forming conductive elements, such as conductive layers and electrodes, using chemical vapor deposition. A conductive precursor gas, such as a platinum precursor gas, having organic compounds to improve step coverage is introduced into a chemical vapor deposition chamber. A reactant is also introduced into the chamber that reacts with residue organic compounds on the conductive element so as to remove the organic compounds from the nucleating sites to thereby permit more efficient subsequent chemical vapor deposition of conductive elements.

摘要翻译： 一种使用化学气相沉积更有效地形成诸如导电层和电极的导电元件的技术。 将具有改善步骤覆盖度的有机化合物的导电前体气体，例如铂前体气体引入化学气相沉积室。 反应物也被引入室中，与导电元件上的残余有机化合物反应，以便从成核位置除去有机化合物，从而允许更有效的后续化学气相沉积导电元件。

公开(公告)号：US06539341B1

公开(公告)日：2003-03-25

申请号：US09706947

申请日：2000-11-06

申请人： Weimin Li ,  Sajid Hussain ,  Andrew Nakao ,  Vikas Khandelwal

发明人： Weimin Li ,  Sajid Hussain ,  Andrew Nakao ,  Vikas Khandelwal

IPC分类号： G06F300

CPC分类号： G01R31/31935 ,  G01R31/3172

摘要： Log entries in a system that produces status or other log data (ASIC verification system, for example) are saved in a circular buffer until a trigger event occurs. Typically, the system operates on a Device Under Test (DUT), but may apply to other systems that simply monitor or gather information. When the trigger occurs, a window of the saved log entries are saved to disk. A level of granularity of the reporting for the log entries is set at any point between low level (cycle based) reporting (recording every event) to high level functional descriptions of the processes or activities performed by the system, DUT, or other item being monitored. Log data from various modules of the system are grouped together to provide a logical view of the recorded log entries.

摘要翻译： 产生状态或其他日志数据的系统中的日志条目（例如，ASIC验证系统）将保存在循环缓冲区中，直到触发事件发生。 通常，系统在被测器件（DUT）上运行，但可能适用于简单地监视或收集信息的其他系统。 当触发发生时，保存的日志条目的窗口将保存到磁盘。 对于日志条目的报告的粒度级别设置在低级（基于周期）报告（记录每个事件）之间的任何时间点到由系统，DUT或其他项目执行的进程或活动的高级功能描述 监控。 将来自系统的各个模块的日志数据分组在一起以提供记录的日志条目的逻辑视图。

公开(公告)号：US06515363B2

公开(公告)日：2003-02-04

申请号：US09407334

申请日：1999-09-29

申请人： Weimin Li

发明人： Weimin Li

IPC分类号： H01L2348

CPC分类号： H01L21/76846 ,  H01L21/28568 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76868 ,  H01L21/76876 ,  Y10S438/974

摘要： A method of de-oxidizing a surface onto which a refractory metal or molecule which contains a refractory metal atom will be adhered. The method utilizes a plasma which includes a gas such as argon, nitrogen, helium or hydrogen, or a mixture of any of the foregoing, to remove oxygen molecules from the surface to which adherence of the refractory metal is desired. Radicals in the plasma coat the surface to prevent further oxidation thereof. The method also includes techniques for depositing refractory metals onto a surface such as a substrate or layer of semiconductor material on which integrated circuitry has been fabricated.

公开(公告)号：US06198144B1

公开(公告)日：2001-03-06

申请号：US09376232

申请日：1999-08-18

申请人： Pai-Hung Pan ,  Martin C. Roberts ,  Gurtei S. Sandhu ,  Weimin Li ,  Christopher W. Hill ,  Vishnu K. Agarwal

发明人： Pai-Hung Pan ,  Martin C. Roberts ,  Gurtei S. Sandhu ,  Weimin Li ,  Christopher W. Hill ,  Vishnu K. Agarwal

IPC分类号： H01L213205

CPC分类号： H01L21/28167 ,  H01L21/28061 ,  H01L21/28176 ,  H01L27/10873 ,  H01L29/6653 ,  H01L29/66545

摘要： A method of fabricating an integrated circuit on a wafer includes forming a gate electrode stack over a gate dielectric and forming nitride spacers along sidewalls of the gate electrode stack other than along lowermost portions of the sidewalls. Subsequently, a reoxidation process is performed with respect to the gate dielectric. By providing the nitride spacers along exposed surfaces of conductive barrier and metal layers of the word line stack, those surfaces can be passivated, thereby preventing or reducing the conversion of those layers to non-conductive compounds during the reoxidation process. At the same time, the nitride spacers can be formed so that they do not interfere with the subsequent reoxidation of the gate dielectric. An integrated circuit having a gate electrode stack with nitride spacers extending along sidewalls of the gate electrode stack other than along lowermost portions of the sidewalls is also disclosed.

摘要翻译： 在晶片上制造集成电路的方法包括在栅极电介质上形成栅极电极堆叠，并且沿着侧壁的最下部分沿着栅电极堆叠的侧壁形成氮化物间隔物。 随后，对栅极电介质进行再氧化处理。 通过在字线堆叠的导电阻挡层和金属层的暴露表面上设置氮化物间隔物，可以钝化那些表面，从而在再氧化过程期间防止或减少这些层向非导电化合物的转化。 同时，可以形成氮化物间隔物，使得它们不干扰栅极电介质的随后的再氧化。 还公开了具有栅极电极堆叠的集成电路，其具有沿着侧壁的侧壁延伸的氮化物间隔物，而不是沿着侧壁的最下部分延伸。