公开(公告)号：US08519419B2

公开(公告)日：2013-08-27

申请号：US13171472

申请日：2011-06-29

申请人： Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang ,  Chia-Hung Huang

发明人： Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang ,  Chia-Hung Huang

IPC分类号： H01L33/00

CPC分类号： H01L33/20 ,  H01L33/007 ,  H01L33/12 ,  H01L33/382 ,  H01L33/46

摘要： A semiconductor light-emitting structure includes a silicon substrate, a distributed Bragg reflector, a semiconductor structures layer and an epitaxy connecting layer. The silicon substrate has a top surface. The distributed Bragg reflector is formed on the top surface of the silicon substrate. The semiconductor structures layer is configured for emitting light. The epitaxy connecting layer is placed between the distributed Bragg reflector and the semiconductor structures layer. Grooves extend from the semiconductor structures layer through the epitaxy connecting layer and the distributed Bragg reflector to reach the semiconductor structures layer.

摘要翻译： 半导体发光结构包括硅衬底，分布式布拉格反射器，半导体结构层和外延连接层。 硅衬底具有顶表面。 分布式布拉格反射器形成在硅衬底的顶表面上。 半导体结构层被配置为发光。 外延连接层放置在分布式布拉格反射器和半导体结构层之间。 沟槽从半导体结构层延伸穿过外延连接层和分布式布拉格反射器到达半导体结构层。

公开(公告)号：US08563340B2

公开(公告)日：2013-10-22

申请号：US13216244

申请日：2011-08-24

申请人： Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang ,  Chia-Hung Huang

发明人： Shih-Cheng Huang ,  Po-Min Tu ,  Shun-Kuei Yang ,  Chia-Hung Huang

IPC分类号： H01L21/00 ,  H01L33/60

CPC分类号： H01L33/0079 ,  H01L33/0095 ,  H01L33/46

摘要： A method for manufacturing light emitting chips includes steps of: providing a substrate having a plurality of separate epitaxy islands thereon, wherein the epitaxy islands are spaced from each other by channels; filling the channels with an insulation material; sequentially forming a reflective layer, a transition layer and a base on the insulation material and the epitaxy islands; removing the substrate and the insulation material to expose the channels; and cutting the reflective layer, the transition layer and the base to form a plurality of individual chips along the channels.

摘要翻译： 制造发光芯片的方法包括以下步骤：提供其上具有多个分离的外延岛的衬底，其中所述外延岛通过沟道彼此间隔开; 用绝缘材料填充通道; 在绝缘材料和外延岛上依次形成反射层，过渡层和基底; 去除衬底和绝缘材料以暴露通道; 并且切割反射层，过渡层和基底，以沿通道形成多个独立的芯片。

公开(公告)号：US08536597B2

公开(公告)日：2013-09-17

申请号：US13214254

申请日：2011-08-22

申请人： Po-Min Tu ,  Shih-Cheng Huang ,  Shun-Kuei Yang ,  Chia-Hung Huang

发明人： Po-Min Tu ,  Shih-Cheng Huang ,  Shun-Kuei Yang ,  Chia-Hung Huang

IPC分类号： H01L33/14 ,  H01L33/18

CPC分类号： H01L33/0079 ,  H01L33/20 ,  H01L33/405

摘要： A light emitting diode chip includes an electrically conductive substrate, a reflecting layer disposed on the substrate, a semiconductor structure formed on the reflecting layer, an electrode disposed on the semiconductor structure, and a plurality of slots extending through the semiconductor structure. The semiconductor structure includes a P-type semiconductor layer formed on the reflecting layer, a light-emitting layer formed on the P-type semiconductor layer, and an N-type semiconductor layer formed on the light-emitting layer. A current diffusing region is defined in the semiconductor structure and around the electrode. The slots are located outside the current diffusing region.

摘要翻译： 发光二极管芯片包括导电衬底，设置在衬底上的反射层，形成在反射层上的半导体结构，设置在半导体结构上的电极和延伸穿过半导体结构的多个槽。 半导体结构包括形成在反射层上的P型半导体层，形成在P型半导体层上的发光层和形成在发光层上的N型半导体层。 在半导体结构中和电极周围限定电流扩散区。 槽位于电流扩散区域外部。

公开(公告)号：US08466033B2

公开(公告)日：2013-06-18

申请号：US13052127

申请日：2011-03-21

申请人： Po-Min Tu ,  Shih-Cheng Huang ,  Shun-Kuei Yang ,  Chia-Hung Huang

发明人： Po-Min Tu ,  Shih-Cheng Huang ,  Shun-Kuei Yang ,  Chia-Hung Huang

IPC分类号： H01L21/76 ,  H01L21/70

CPC分类号： H01L33/007 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0259 ,  H01L21/02664 ,  H01L21/02667 ,  H01L33/16 ,  H01L33/32

摘要： A light emitting diode comprises a substrate, a buffer layer, a semiconductor layer and a semiconductor light emitting layer. The buffer layer is disposed on the substrate. The semiconductor layer is disposed on the buffer layer. The semiconductor light emitting layer is disposed on the semiconductor layer. A plurality of voids is defined within the semiconductor layer. Each void encloses air therein. A method for manufacturing the light emitting diode is also provided. Light generated by the semiconductor light emitting layer toward the substrate is reflected by the voids to emit out of the light emitting diode.

摘要翻译： 发光二极管包括衬底，缓冲层，半导体层和半导体发光层。 缓冲层设置在基板上。 半导体层设置在缓冲层上。 半导体发光层设置在半导体层上。 在半导体层内限定多个空隙。 每个空隙都包围其中的空气。 还提供了一种用于制造发光二极管的方法。 由半导体发光层朝向衬底产生的光被空隙反射以发射出发光二极管。

公开(公告)号：US20110278613A1

公开(公告)日：2011-11-17

申请号：US12975229

申请日：2010-12-21

申请人： Po-Min Tu ,  Shih-Cheng Huang ,  Chia-Hung Huang ,  Shun-Kuei Yang

发明人： Po-Min Tu ,  Shih-Cheng Huang ,  Chia-Hung Huang ,  Shun-Kuei Yang

IPC分类号： H01L33/60 ,  H01L33/12

CPC分类号： H01L33/007 ,  H01L33/10 ,  H01L33/32

摘要： A light emitting diode includes a substrate, a buffer layer on the substrate, a patterned layer having a first reflective index on the buffer layer, a semiconductor layer having a second reflective index on the patterned layer, and an illumination structure on the semiconductor layer. A method for manufacturing the light emitting diode is also provided.

摘要翻译： 发光二极管包括衬底，衬底上的缓冲层，在缓冲层上具有第一反射率的图案化层，在图案化层上具有第二反射率的半导体层以及半导体层上的照明结构。 还提供了一种用于制造发光二极管的方法。

公开(公告)号：US5732536A

公开(公告)日：1998-03-31

申请号：US739072

申请日：1996-10-28

申请人： Ching-Lin Lin ,  Chia-Hung Huang ,  Do-Yu Lee

发明人： Ching-Lin Lin ,  Chia-Hung Huang ,  Do-Yu Lee

IPC分类号： B65B5/10 ,  B65B35/30

CPC分类号： B65B5/106

摘要： A tape roll in-series package machine for neatly packing a plurality of tape rolls into a paper box. In includes (a) a conveying device, (b) an in-series filling device, and (c) a paper box elevating device. The in-series filling device contains first, second, and third pneumatic cylinder each of which is connected to a receiving plate to cooperatively pack a row of the tape rolls into a paper box. The paper elevating device contains (i) a paper box conveyor which is divided into front section, middle and rear sections, each of the sections is driven by a separate mechanism; (ii) an elevating frame disposed above the middle section of the paper box conveyor, wherein the elevating frame contains a pair of fending plates each being driven by a revolving pneumatic cylinder for holding the paper box in place and facilitating the incoming and outgoing motions of the paper box; and (iii) a Z-axis stepping motor which is provided to control an up-and-down motion of the elevating frame so as to adjust a vertical position of the paper box.

摘要翻译： 一种用于将多个带卷整齐地包装在纸盒中的胶带卷筒式包装机。 包括（a）输送装置，（b）串联充填装置，和（c）纸盒升降装置。 串联式灌装装置包括第一，第二和第三气缸，每个气缸连接到接收板，以将一排带卷协同地包装在纸盒中。 纸张升降装置包括：（i）纸箱输送机，其分为前段，中间和后段，每个区段由单独的机构驱动; （ii）设置在纸箱输送机的中间部分上方的升降框架，其中升降架包括一对防火板，每个挡板由用于将纸盒保持在适当位置的旋转气动缸驱动，并且有利于进入和离开运动 纸盒; 和（iii）Z轴步进电机，其被设置为控制升降框架的上下运动，以调节纸盒的垂直位置。

公开(公告)号：US20150265917A1

公开(公告)日：2015-09-24

申请号：US14220150

申请日：2014-03-20

申请人： Chia-Han Chang ,  Chia-Hung Huang ,  Mark Junren Wiener

发明人： Chia-Han Chang ,  Chia-Hung Huang ,  Mark Junren Wiener

IPC分类号： A63F13/31 ,  A63F13/215 ,  A63F13/213 ,  A63F13/212 ,  A63F13/217

CPC分类号： F41J5/04 ,  F41J5/00 ,  F42B12/365 ,  F42B12/40 ,  F42B30/006

摘要： A game apparatus having an attack apparatus, a wearable apparatus and a communication apparatus is provided. The communication apparatus determines a property of the attack apparatus according to an attack signal sensed by the wearable apparatus and adjusts a status prompt signal emitted by the wearable apparatus according to the property of the attack apparatus.

摘要翻译： 提供具有攻击装置，可穿戴装置和通信装置的游戏装置。 通信装置根据由可穿戴装置感测到的攻击信号来确定攻击装置的属性，并根据攻击装置的属性调整由可穿戴装置发出的状态提示信号。

公开(公告)号：US08492304B2

公开(公告)日：2013-07-23

申请号：US12650102

申请日：2009-12-30

申请人： Weng-Sing Hwang ,  Shyh-Jiun Liu ,  Chia-Hung Huang ,  Chun-Kai Huang

发明人： Weng-Sing Hwang ,  Shyh-Jiun Liu ,  Chia-Hung Huang ,  Chun-Kai Huang

IPC分类号： B01J31/12 ,  B01J23/745 ,  C01G49/08

CPC分类号： B01J37/086 ,  B01J21/18 ,  B01J23/745 ,  B01J31/1805 ,  B01J31/1815 ,  B01J35/002 ,  B01J35/006 ,  B01J2531/842 ,  B82Y30/00 ,  C01G49/08 ,  C01P2002/72 ,  C01P2004/04 ,  C01P2004/64 ,  C01P2006/40 ,  C07F15/025 ,  H01M4/9016 ,  H01M4/9083 ,  H01M2008/1095

摘要： A manufacturing method of an iron complex is mixing ferric chloride and at least one chelating agent with a solvent, wherein Fe3+ ions of ferric chloride is reacted with the at least one chelating agent to form an iron complex Fe[R1]a[R2]b[H2O]c3+ or Fe[R1]a[H2O]c3+, wherein the at least one chelating agent is selected from a group including ethylenediamine, 1,10-phenanthroline, 2,2′-Bipyridine, diethylenetriamine, triethylenetetraamine, phenanthroline, or bipyridine. Moreover, a method for producing an iron oxide catalyst is mixing ferric chloride, at least one chelating agent and the support with a solvent to form an iron complex, which is incorporated with the support. Following, a drying step and a heat treatment step are processed to get the iron oxide catalyst.

摘要翻译： 铁络合物的制造方法是将氯化铁和至少一种螯合剂与溶剂混合，其中氯化铁的Fe 3+离子与至少一种螯合剂反应形成铁络合物Fe [R1] a [R2] b [H2O] c3 +或Fe [R1] a [H2O] c3 +，其中所述至少一种螯合剂选自包括乙二胺，1,10-菲咯啉，2,2'-联吡啶，二亚乙基三胺，三亚乙基四胺，菲咯啉或 联吡啶。 此外，氧化铁催化剂的制造方法是将氯化铁，至少一种螯合剂和载体与溶剂混合，形成配合了载体的铁络合物。 接着，对干燥工序和热处理工序进行处理，得到氧化铁催化剂。

公开(公告)号：US20130109580A1

公开(公告)日：2013-05-02

申请号：US13283704

申请日：2011-10-28

申请人： Chia-Hung Huang ,  Shui-Cheng Lee ,  Pei-Tzu Ku ,  Ker-Jer Huang

发明人： Chia-Hung Huang ,  Shui-Cheng Lee ,  Pei-Tzu Ku ,  Ker-Jer Huang

IPC分类号： C40B30/04 ,  C40B40/10

CPC分类号： G01N33/57484 ,  C07K5/0815 ,  C07K5/1019 ,  C07K7/06

摘要： Peptide ligands are found. All of the peptide ligands have high-affinity against a tumor biomarker, GRP-78. Phage display library is used for screening out the peptide ligands. The peptide ligands can be labeled with a luminescent or a radioactive material to be used as probes for detecting tumor.

摘要翻译： 发现肽配体。 所有肽配体对肿瘤生物标志物GRP-78具有高亲和力。 噬菌体展示文库用于筛选肽配体。 肽配体可以用发光或放射性物质进行标记，以用作检测肿瘤的探针。

公开(公告)号：US08082055B2

公开(公告)日：2011-12-20

申请号：US12499345

申请日：2009-07-08

申请人： Chun-Hsien Lin ,  Andy Tsen ,  Jui-Long Chen ,  Sunny Wu ,  Jong-I Mou ,  Chia-Hung Huang

发明人： Chun-Hsien Lin ,  Andy Tsen ,  Jui-Long Chen ,  Sunny Wu ,  Jong-I Mou ,  Chia-Hung Huang

IPC分类号： G06F19/00

CPC分类号： G06Q10/06 ,  G06Q30/0202

摘要： A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.

摘要翻译： 公开了一种用于在集成电路器件制造工艺的早期阶段提供容量比预测的方法。 该方法包括从一个或多个处理的晶片批次收集历史数据; 从一个或多个偏斜晶片批量收集测量数据; 从收集的历史数据和收集的测量数据生成估计的基线分布; 基于一个或多个指定参数和所生成的估计基线分布产生估计的性能分布; 通过对所生成的估计性能分布应用仓定义和产量退化因子估计来确定仓比预测; 根据仓比预测确定一个或多个生产目标; 以及基于所述一个或多个确定的生产目标来处理一个或多个晶圆。