公开(公告)号：US5113300A

公开(公告)日：1992-05-12

申请号：US752220

申请日：1991-08-21

Applicant: Yoshito Ikeda ,  Hiroaki Narisawa ,  Noboru Wakabayashi

Inventor： Yoshito Ikeda ,  Hiroaki Narisawa ,  Noboru Wakabayashi

IPC: G11B5/31

CPC classification number: G11B5/31 ,  G11B5/3116

Abstract: A thin film magnetic head which includes a substrate of magnetic or nonmagnetic material, an upper magnetic film on the substrate, a coil conductor on the substrate, and a lower magnetic film on the substrate, the lower magnetic film having a groove formed therein for receiving the coil conductor therein. In the preferred form of the present invention, the thickness of the lower magnetic film is at least 0.3 times the thickness of the upper magnetic film when the substrate is composed of a magnetic material and at least 0.8 times the thickness of the upper magnetic film when the substrate is composed of a nonmagnetic material.

Abstract translation: 一种薄膜磁头，其包括磁性或非磁性材料的衬底，衬底上的上部磁性膜，衬底上的线圈导体和衬底上的下部磁性膜，下部磁性膜具有形成在其中的槽，用于接收 其中的线圈导体。 在本发明的优选形式中，当基板由磁性材料构成时，下部磁性膜的厚度为上部磁性膜的厚度的至少0.3倍，并且当上部磁性膜的厚度为至少0.8倍时 基板由非磁性材料构成。

公开(公告)号：US4553865A

公开(公告)日：1985-11-19

申请号：US502857

申请日：1983-06-09

Applicant: Yoshito Ikeda ,  Hitoshi Fujiwara ,  Yoshifumi Gomi ,  Masanao Matsuzawa ,  Yasuhito Hirashima

Inventor： Yoshito Ikeda ,  Hitoshi Fujiwara ,  Yoshifumi Gomi ,  Masanao Matsuzawa ,  Yasuhito Hirashima

IPC: B41J2/255 ,  B41J2/305 ,  B41J3/12

CPC classification number: B41J2/305 ,  B41J2/255

Abstract: A wire dot printer comprises a plurality of wires for carrying ink respectively on the ends thereof, and ink applicator mechanism applying the ink to the wire, and an ink heater unit disposed adjacent to the wire ends for heating the ink to a controlled temperature level. The ink is applied to the side surfaces of the wires and is drawn to the wire ends by capillary attraction.

Abstract translation: 线点打印机包括分别在其端部承载油墨的多根线和将油墨施加到线材上的油墨施加器机构，以及与线端相邻布置的用于将油墨加热到受控温度水平的墨加热器单元。 油墨被施加到线的侧表面，并通过毛细管吸引力被吸引到线端。

公开(公告)号：US08377340B2

公开(公告)日：2013-02-19

申请号：US12630971

申请日：2009-12-04

Applicant: Yoshihiro Kato ,  Yoshito Ikeda

Inventor： Yoshihiro Kato ,  Yoshito Ikeda

IPC: H01B1/22 ,  G21F1/08

CPC classification number: H05K9/0083

Abstract: Disclosed is an electromagnetic wave suppression sheet obtained by mixing metallic magnetic particles into a resin and formed into a sheet shape. In the electromagnetic wave suppression sheet, a coercive force is 320 [A/m] or more and a saturation magnetization is 0.35 [Wb/m2] or more at a time when an external magnetic field of 1 kOe in an in-plane direction is applied.

Abstract translation: 公开了一种通过将金属磁性颗粒混合成树脂并形成为片状而获得的电磁波抑制片。 在电磁波抑制片中，当在面内方向上的1kOe的外部磁场为（E）的情况下，矫顽力为320 [A / m]以上，饱和磁化强度为0.35 [Wb / m 2] 应用。

公开(公告)号：US07585706B2

公开(公告)日：2009-09-08

申请号：US11898951

申请日：2007-09-18

Applicant: Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

Inventor： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

IPC: H01L21/336

CPC classification number: H01L29/66863 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7783

Abstract: The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.

Abstract translation: 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。

公开(公告)号：US07285806B2

公开(公告)日：2007-10-23

申请号：US09813304

申请日：2001-03-21

Applicant: Katsunori Nishi ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

Inventor： Katsunori Nishi ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

IPC: H01L31/00 ,  H01L21/336

CPC classification number: H01L29/66863 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7783

Abstract: The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.

Abstract translation: 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。

公开(公告)号：US06852612B2

公开(公告)日：2005-02-08

申请号：US10323637

申请日：2002-12-20

Applicant: Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

Inventor： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

IPC: H01L21/285 ,  H01L21/338 ,  H01L23/48 ,  H01L29/20 ,  H01L29/47 ,  H01L29/812 ,  H01L31/00 ,  H01L33/32 ,  H01L33/40 ,  H01L21/28

CPC classification number: H01L29/475 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/66856 ,  H01L29/66863 ,  H01L29/812 ,  H01L33/32 ,  H01L33/40

Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.

Abstract translation: 本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

公开(公告)号：US20050006664A1

公开(公告)日：2005-01-13

申请号：US10909425

申请日：2004-08-03

Applicant: Kaoru Inoue ,  Yoshito Ikeda ,  Hiroyuki Masato

Inventor： Kaoru Inoue ,  Yoshito Ikeda ,  Hiroyuki Masato

IPC: H01L21/205 ,  H01L21/338 ,  H01L29/20 ,  H01L29/778 ,  H01L29/812 ,  H01L31/0328

CPC classification number: H01L29/7783 ,  H01L29/2003

Abstract: A semiconductor device includes an AlGaN film formed on a GaN film on a substrate, a gate electrode formed on the AlGaN film, and source and drain electrodes formed on either side of the gate electrode on the AlGaN film. An n-type InxGayAl1-x-yN film is interposed between the source and drain electrodes and the AlGaN film. Alternatively, the semiconductor device includes an n-type InxGayAl1-x-yN film formed on a GaN film on a substrate, a gate electrode formed on the InxGayAl1-x-yN film, and source and drain electrodes formed on either side of the gate electrode on the InxGayAl1-x-yN film.

Abstract translation: 半导体器件包括形成在基板上的GaN膜上的AlGaN膜，形成在AlGaN膜上的栅电极，以及形成在AlGaN膜上的栅电极的两侧的源极和漏极。 在源电极和漏电极和AlGaN膜之间插入n型In x Ga y Al 1-x-y N膜。 或者，半导体器件包括形成在衬底上的GaN膜上的n型In x Ga y Al 1-x-y N膜，形成在In x Ga y Al 1-x-y N膜上的栅电极，以及形成在栅极两侧的源极和漏极 InxGayAl1-x-yN膜上的电极。

公开(公告)号：US20050001235A1

公开(公告)日：2005-01-06

申请号：US10834362

申请日：2004-04-29

Applicant: Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

Inventor： Tomohiro Murata ,  Yutaka Hirose ,  Yoshito Ikeda ,  Tsuyoshi Tanaka ,  Kaoru Inoue ,  Daisuke Ueda ,  Yasuhiro Uemoto

IPC: H01L21/20 ,  H01L21/28 ,  H01L21/338 ,  H01L29/20 ,  H01L29/417 ,  H01L29/778 ,  H01L29/812 ,  H01L31/0328 ,  H01S5/30

CPC classification number: H01L29/7787 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766

Abstract: A semiconductor device has: a buffer layer formed on a conductive substrate and made of AlxGa1-xN with a high resistance; an element-forming layer formed on the buffer layer, having a channel layer, and made of undoped GaN and N-type AlyGa1-yN; and a source electrode, a drain electrode and a gate electrode which are selectively formed on the element-forming layer. The source electrode is filled in a through hole provided in the buffer layer and the element-forming layer, and is thus electrically connected to the conductive substrate.

Abstract translation: 半导体器件具有：形成在导电基板上并由高电阻的Al x Ga 1-x N构成的缓冲层; 形成在缓冲层上的元件形成层，具有沟道层，由未掺杂的GaN和N型Al y Ga 1-y N制成; 以及选择性地形成在元件形成层上的源电极，漏电极和栅电极。 源电极被填充在设置在缓冲层和元件形成层中的通孔中，因此电连接到导电基板。

公开(公告)号：US06809352B2

公开(公告)日：2004-10-26

申请号：US10329675

申请日：2002-12-27

Applicant: Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

Inventor： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

IPC: H01L310328

CPC classification number: H01L29/475 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/66856 ,  H01L29/66863 ,  H01L29/812 ,  H01L33/32 ,  H01L33/40

Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.

Abstract translation: 本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

公开(公告)号：US06770922B2

公开(公告)日：2004-08-03

申请号：US10372979

申请日：2003-02-26

Applicant: Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

Inventor： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC: H01L2976

CPC classification number: H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

Abstract: A semiconductor device has a first semiconductor layer composed of a group III-V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III-V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

Abstract translation: 半导体器件具有由III-V族氮化物构成的第一半导体层，通过氧化由位于第一半导体层的栅电极形成区域上的III-V族氮化物构成的第二半导体层而形成的氧化膜， 在氧化膜上形成的绝缘膜具有与氧化膜的组成不同的组成，以及形成在绝缘膜上的栅电极。