Integrated switch module
    11.
    发明授权
    Integrated switch module 有权
    集成开关模块

    公开(公告)号:US09252767B1

    公开(公告)日:2016-02-02

    申请号:US13135194

    申请日:2011-06-28

    IPC分类号: G05F1/10 H03K17/693

    摘要: An integrated RF switch module including a package customized to include at least one trace. The trace includes one or more of at least one connection pad and at least one landing pad. At least one switching die is connected to the at least one connection pad. At least one device is connected to the at least one landing pad, the at least one device configured to enhance the performance of the switching die.

    摘要翻译: 一种集成RF开关模块,其包括被定制成包括至少一个迹线的封装。 轨迹包括至少一个连接垫和至少一个着陆垫中的一个或多个。 至少一个开关管芯连接到所述至少一个连接焊盘。 至少一个设备连接到所述至少一个着陆垫,所述至少一个设备被配置为增强所述切换管芯的性能。

    Wideband analog bandpass filter
    12.
    发明授权
    Wideband analog bandpass filter 有权
    宽带模拟带通滤波器

    公开(公告)号:US09166564B2

    公开(公告)日:2015-10-20

    申请号:US12931487

    申请日:2011-02-01

    申请人: Michael Koechlin

    发明人: Michael Koechlin

    IPC分类号: H03H7/01 H03H7/12 H03J3/26

    摘要: A wideband bandpass filter includes an RF input terminal, an RF output terminal, a plurality of electrically tunable coupling capacitors coupled in series between the RF input and output terminals, and a plurality of resonating circuits each including an electrically tunable resonator capacitor coupled to one of the coupling capacitors. At least one resistance is coupled in series between at least one of the coupling capacitors for providing enhanced out of band rejection of the filter.

    摘要翻译: 宽带带通滤波器包括RF输入端子,RF输出端子,串联耦合在RF输入和输出端子之间的多个电可调谐耦合电容器,以及多个谐振电路,每个谐振电路包括耦合到 耦合电容。 至少一个电阻串联在至少一个耦合电容器之间,用于提供滤波器的增强的带外抑制。

    Internally, Resistively, Sensed Darlington Amplifier
    13.
    发明申请
    Internally, Resistively, Sensed Darlington Amplifier 有权
    内部,电阻式,感应达林顿放大器

    公开(公告)号:US20140266466A1

    公开(公告)日:2014-09-18

    申请号:US13827139

    申请日:2013-03-14

    发明人: Joseph Cuggino

    IPC分类号: H03F3/19

    摘要: An internally, resistively, sensed Darlington amplifier includes a Darlington amplifier, at least an input transistor, an output transistor, a resistive divider, a signal input node, and a signal output node. The Darlington amplifier is responsive to an input signal and configured to generate an output signal. An internal bias setting resistor is coupled between the signal output node, a collector of the output transistor, and the resistive divider. The bias setting resistor is configured to set and regulate the bias current of the Darlington amplifier.

    摘要翻译: 内部,电阻感应的达林顿放大器包括达林顿放大器,至少输入晶体管,输出晶体管,电阻分压器,信号输入节点和信号输出节点。 达林顿放大器响应于输入信号并被配置为产生输出信号。 内部偏置设置电阻耦合在信号输出节点,输出晶体管的集电极和电阻分压器之间。 偏置设置电阻器被配置为设置和调节达林顿放大器的偏置电流。

    Digital synchronization of broadcast frequency
    14.
    发明授权
    Digital synchronization of broadcast frequency 失效
    数字同步广播频率

    公开(公告)号:US5867536A

    公开(公告)日:1999-02-02

    申请号:US798651

    申请日:1997-02-11

    摘要: A dynamic, self adjusting synchronization system for real time control of the frequency and bandwidth of a modulated signal includes a voltage controlled oscillator for generating a carrier signal to be modulated having a predetermined frequency and bandwidth. There is an adjustment device having a center frequency adjustment circuit for providing a voltage level to the voltage controlled oscillator. A modulation generator generates a modulation signal for modulating the carrier signal to produce a modulated carrier signal and a co-generated measurement signal synchronized with the modulation signal. There is a device for selectively inhibiting the modulation signal. A measurement device includes a counter device to selectively count the pulses of the modulated carrier signal for a first predetermined period of time and counting the pulses of the carrier signal for a second predetermined period of time while the modulation signal is inhibited and a measurement circuit, responsive to the co-generated measurement signal, to synchronously define the first predetermined period of time during which the modulated carrier pulses are counted and is responsive to a timing signal to define the second predetermined period of time during which the modulation signal is inhibited for counting the carrier pulses. The adjustment device is responsive to the measurement device, for varying the voltage applied to the voltage controlled oscillator to maintain the predetermined frequency of the carrier signal, and is responsive to the measurement device for varying the voltage applied to the voltage controlled oscillator to maintain the predetermined bandwidth of the modulated carrier signal.

    摘要翻译: 用于对调制信号的频率和带宽进行实时控制的动态,自调节同步系统包括用于产生具有预定频率和带宽的待调制载波信号的压控振荡器。 存在具有用于向压控振荡器提供电压电平的中心频率调节电路的调节装置。 调制发生器产生用于调制载波信号的调制信号,以产生与调制信号同步的调制载波信号和共同产生的测量信号。 存在用于选择性地抑制调制信号的装置。 测量装置包括:计数器装置,用于在调制信号被禁止的同时,在第一预定时间周期内选择性地对已调制载波信号的脉冲进行计数,并对载波信号的脉冲进行计数第二预定时间段;以及测量电路, 响应于共同生成的测量信号,以同步地限定在其中对调制的载波脉冲进行计数的第一预定时间段,并响应于定时信号来定义调制信号被禁止计数的第二预定时间段 载波脉冲。 调节装置响应于测量装置,用于改变施加到压控振荡器的电压以维持载波信号的预定频率,并且响应于测量装置改变施加到压控振荡器的电压,以维持 调制载波信号的预定带宽。

    High-power FET circuit
    15.
    发明授权
    High-power FET circuit 失效
    大功率FET电路

    公开(公告)号:US4992764A

    公开(公告)日:1991-02-12

    申请号:US313012

    申请日:1989-02-21

    申请人: Yalcin Ayasli

    发明人: Yalcin Ayasli

    摘要: A power FET includes a substrate of semi-insulating material having a top side and a ground side; an FET fabricated on the ground side of the substrate; and conductor means in the substrate extending from the drain electrode and the gate electrode on the ground side to the top side of the substrate. A ground plane on the ground side of the substrate contacts the source electrode of the FET and is spaced from the gate and drain electrodes to form a dome for minimizing ground inductance and maximizing heat transfer from the FET independent of the thickness of the substrate.

    摘要翻译: 功率FET包括具有顶侧和接地侧的半绝缘材料的衬底; 制造在衬底的接地侧的FET; 以及在衬底中的漏电极和栅电极延伸到衬底的顶侧的衬底中的导体装置。 衬底的接地面上的接地面与FET的源电极接触,并与栅电极和漏电极间隔开,以形成一个最小化接地电感的圆顶,并最大限度地提高来自FET的热传递,而与衬底的厚度无关。

    Cascaded low pass/high pass filter phase shifter system
    16.
    发明授权
    Cascaded low pass/high pass filter phase shifter system 失效
    级联低通/高通滤波器移相器系统

    公开(公告)号:US4893035A

    公开(公告)日:1990-01-09

    申请号:US248587

    申请日:1988-09-26

    IPC分类号: H03K17/687

    CPC分类号: H03K17/6871

    摘要: A cascaded low pass/high pass filter phase shifter system including: a series of semiconductor switches each having a control electrode and first and second load electrodes; a capacitance connected in series between each control electrode and ground; an inductance connected in series between each second load electrode of one semiconductor switch and the first load electrode of the adjacent semiconductor switch in the series; and means for selectively applying a control signal to each said control electrode for switching the associated semiconductor switch between a first state in which it operates as a low pass filter and a second state in which it operates as a high pass filter to introduce a phase shift in a propagated signal.

    摘要翻译: 一种级联的低通/高通滤波器移相器系统,包括:一系列半导体开关,每个具有控制电极和第一和第二负载电极; 在每个控制电极和地之间串联连接的电容; 串联连接在一个半导体开关的每个第二负载电极和串联的相邻半导体开关的第一负载电极之间的电感; 以及用于选择性地将控制信号施加到每个所述控制电极的装置,用于在其作为低通滤波器操作的第一状态和其中作为高通滤波器操作的第二状态之间切换相关联的半导体开关,以引入相移 在传播的信号。

    Edge launch transition for a printed circuit board
    17.
    发明授权
    Edge launch transition for a printed circuit board 有权
    印刷电路板的边缘发射转换

    公开(公告)号:US09173292B1

    公开(公告)日:2015-10-27

    申请号:US13385859

    申请日:2012-03-09

    IPC分类号: H05K1/11 H05K3/32

    摘要: An edge launch and fabrication method wherein spaced elongated slots are formed through a circuit board. The slots are plated at least along one side thereof connecting ground planes of the circuit board thus forming spaced edge plated regions. Circuit modules are produced by singulating the circuit board along a cut line offset outwardly from the plated slot sides to form an edge launch outwardly extending from and between the spaced edge plated regions.

    摘要翻译: 边缘发射和制造方法,其中间隔的细长槽通过电路板形成。 这些槽至少沿着连接电路板的接地平面的一侧进行电镀,从而形成间隔开的边缘电镀区域。 电路模块通过沿着从电镀槽侧向外偏移的切割线分割电路板而产生,以形成从间隔边缘镀覆区域之间向外延伸的边缘发射。

    Voltage controlled oscillator
    18.
    发明授权
    Voltage controlled oscillator 有权
    压控振荡器

    公开(公告)号:US08957738B1

    公开(公告)日:2015-02-17

    申请号:US13654846

    申请日:2012-10-18

    IPC分类号: H03B5/12 H03L7/00

    摘要: A voltage controlled oscillator including an RF output terminal and a DC control terminal, an active circuit, and a resonant circuit interconnected with the active circuit and including a plurality of series resonators each having an electrically variable capacitance and fixed inductor; the active circuit includes at least one transistor having an operating current density which is approximately 35% or less of the peak fT operating current density and/or the active circuit includes a multi-transistor bank disposed in at least two separate sections, each pair of sections spaced apart to provide improved thermal uniformity among the transistors without substantially increasing parasitic impedance among them for providing an improved lower phase noise output at said RF output terminal.

    摘要翻译: 包括RF输出端子和DC控制端子的压控振荡器,有源电路和与有源电路互连的谐振电路,并且包括多个串联谐振器,每个具有电可变电容和固定电感器; 有源电路包括至少一个晶体管,其工作电流密度约为峰值fT工作电流密度的大约35%或更小,和/或有源电路包括设置在至少两个分开的部分中的多晶体管组,每对 部分间隔开以提供晶体管之间的改善的热均匀性,而基本上不增加它们之间的寄生阻抗,以在所述RF输出端子处提供改进的较低相位噪声输出。

    ADC WITH ENHANCED AND/OR ADJUSTABLE ACCURACY
    19.
    发明申请
    ADC WITH ENHANCED AND/OR ADJUSTABLE ACCURACY 审中-公开
    ADC具有增强和/或可调节精度

    公开(公告)号:US20150042499A1

    公开(公告)日:2015-02-12

    申请号:US14300889

    申请日:2014-06-10

    发明人: Oystein Moldsvor

    IPC分类号: H03M1/08 H03M1/12

    摘要: An analog-to-digital-converter includes an input signal connector, an output signal port, two or more sub-ADCs, and a digital signal processing block. The result from each sub-ADC is used by the digital signal processing block to output data with increased performance.

    摘要翻译: 模数转换器包括输入信号连接器,输出信号端口,两个或多个子ADC,以及数字信号处理块。 每个子ADC的结果由数字信号处理块用于以更高的性能输出数据。