公开(公告)号：US07560037B2

公开(公告)日：2009-07-14

申请号：US11213466

申请日：2005-08-26

Applicant: Bevan Staple ,  Jillian Buriak

Inventor： Bevan Staple ,  Jillian Buriak

IPC: H01B13/00

CPC classification number: B82Y30/00 ,  B81C1/00476 ,  B81C1/00801 ,  B81C2201/0114 ,  B81C2201/0133 ,  B81C2201/0139 ,  B81C2201/053

Abstract: A microelectromechanical structure is formed by depositing sacrificial and structural material over a substrate to form a structural layer on a component electrically attached with the substrate. The galvanic potential of the structural layer is greater than the galvanic potential of the component. At least a portion of the structural material is covered with a protective material that has a galvanic potential less than or equal to the galvanic potential of the component. The sacrificial material is removed with a release solution. At least one of the protective material and release solution is surfactanated, the surfactant functionalizing a surface of the component.

Abstract translation: 通过将牺牲和结构材料沉积在衬底上以在与衬底电连接的部件上形成结构层来形成微机电结构。 结构层的电位大于元件的电位。 结构材料的至少一部分被保护材料覆盖，该保护材料具有小于或等于部件的电位的电位。 牺牲材料用释放溶液除去。 保护材料和释放溶液中的至少一种被表面活性化，表面活性剂对组分的表面进行官能化。

公开(公告)号：US20070289940A1

公开(公告)日：2007-12-20

申请号：US11213466

申请日：2005-08-26

Applicant: Bevan Staple ,  Jillian Buriak

Inventor： Bevan Staple ,  Jillian Buriak

IPC: H01B13/00

CPC classification number: B82Y30/00 ,  B81C1/00476 ,  B81C1/00801 ,  B81C2201/0114 ,  B81C2201/0133 ,  B81C2201/0139 ,  B81C2201/053

Abstract: A microelectromechanical structure is formed by depositing sacrificial and structural material over a substrate to form a structural layer on a component electrically attached with the substrate. The galvanic potential of the structural layer is greater than the galvanic potential of the component. At least a portion of the structural material is covered with a protective material that has a galvanic potential less than or equal to the galvanic potential of the component. The sacrificial material is removed with a release solution. At least one of the protective material and release solution is surfactanated, the surfactant functionalizing a surface of the component.

Abstract translation: 通过将牺牲和结构材料沉积在衬底上以在与衬底电连接的部件上形成结构层来形成微机电结构。 结构层的电位大于元件的电位。 结构材料的至少一部分被保护材料覆盖，该保护材料具有小于或等于部件的电位的电位。 牺牲材料用释放溶液除去。 保护材料和释放溶液中的至少一种被表面活性化，表面活性剂对组分的表面进行官能化。

公开(公告)号：US06759265B2

公开(公告)日：2004-07-06

申请号：US10268711

申请日：2002-10-10

Applicant: Hans Artmann ,  Thorsten Pannek

Inventor： Hans Artmann ,  Thorsten Pannek

IPC: H01L2100

CPC classification number: B81C1/0069 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  B81C2201/0139

Abstract: In a method for producing a diaphragm sensor unit having a semiconductor material substrate, a flat diaphragm and an insulating well for thermal insulation below the diaphragm are generated, for the formation of sensor element structures for at least one sensor. The substrate, made of semiconductor material, in a specified region, which defines sensor element structures, receives a deliberately different doping from the surrounding semiconductor material, that porous semiconductor material is generated from semiconductor material sections between the regions distinguished by doping, and semiconductor material in the well region under semiconductor is rendered porous and under parts of the sensor element structure is removed and/or rendered porous.

Abstract translation: 在制造具有半导体材料基板的隔膜传感器单元的方法中，产生用于形成用于至少一个传感器的传感器元件结构的隔膜下方的平坦隔膜和隔热绝缘孔。 由限定传感器元件结构的特定区域中的由半导体材料制成的衬底接收与周围半导体材料的故意不同的掺杂，多孔半导体材料是由掺杂区域之间的半导体材料部分和半导体材料 在半导体中的阱区域被多孔化并且在传感器元件结构的部分被去除和/或变得多孔的情况下。

公开(公告)号：US20040065637A1

公开(公告)日：2004-04-08

申请号：US10242213

申请日：2002-09-12

Applicant: Network Photonics, Inc.

Inventor： Bevan Staple ,  Jillian Buriak

IPC: C23F001/00

CPC classification number: B82Y30/00 ,  B81C1/00476 ,  B81C1/00801 ,  B81C2201/0114 ,  B81C2201/0133 ,  B81C2201/0139 ,  B81C2201/053

Abstract: A microelectromechanical structure is formed by depositing sacrificial and structural material over a substrate to form a structural layer on a component electrically attached with the substrate. The galvanic potential of the structural layer is greater than the galvanic potential of the component. At least a portion of the structural material is covered with a protective material that has a galvanic potential less than or equal to the galvanic potential of the component. The sacrificial material is removed with a release solution. At least one of the protective material and release solution is surfactanated, the surfactant functionalizing a surface of the component.

Abstract translation: 通过将牺牲和结构材料沉积在衬底上以在与衬底电连接的部件上形成结构层来形成微机电结构。 结构层的电位大于元件的电位。 结构材料的至少一部分被保护材料覆盖，该保护材料具有小于或等于部件的电位的电位。 牺牲材料用释放溶液除去。 保护材料和释放溶液中的至少一种被表面活性化，表面活性剂对组分的表面进行官能化。

公开(公告)号：US20030110867A1

公开(公告)日：2003-06-19

申请号：US10268711

申请日：2002-10-10

Inventor： Hans Artmann ,  Thorsten Pannek

IPC: G01F001/56

CPC classification number: B81C1/0069 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  B81C2201/0139

Abstract: In a method for producing a diaphragm sensor unit having a semiconductor material substrate, a flat diaphragm and an insulating well for thermal insulation below the diaphragm are generated, for the formation of sensor element structures for at least one sensor. The substrate, made of semiconductor material, in a specified region, which defines sensor element structures, receives a deliberately different doping from the surrounding semiconductor material, that porous semiconductor material is generated from semiconductor material sections between the regions distinguished by doping, and semiconductor material in the well region under semiconductor is rendered porous and under parts of the sensor element structure is removed and/or rendered porous.

Abstract translation: 在制造具有半导体材料基板的隔膜传感器单元的方法中，产生用于形成用于至少一个传感器的传感器元件结构的隔膜下方的平坦隔膜和隔热绝缘孔。 由限定传感器元件结构的特定区域中的由半导体材料制成的衬底接收与周围半导体材料的故意不同的掺杂，多孔半导体材料是由掺杂区域之间的半导体材料部分和半导体材料 在半导体中的阱区域被多孔化并且在传感器元件结构的部分被去除和/或变得多孔的情况下。

公开(公告)号：US20180301344A1

公开(公告)日：2018-10-18

申请号：US15986304

申请日：2018-05-22

Applicant: The Board of Trustees of the University of Illinois

Inventor： Lynford Goddard ,  Kaiyuan Wang ,  Chris Edwards ,  Lonna Edwards ,  Xin Yu ,  Gang Logan Liu ,  Samuel Washington ,  Shailendra Srivastava ,  Terry Koker ,  Julianne Lee ,  Catherine Britt Carlson

IPC: H01L21/306 ,  H01L31/0236 ,  C25F3/14 ,  H01L31/0232 ,  H01L21/66 ,  G01B11/24

CPC classification number: H01L21/30604 ,  B81C1/00103 ,  B81C1/00111 ,  B81C1/00119 ,  B81C1/00214 ,  B81C1/00484 ,  B81C1/00539 ,  B81C1/00595 ,  B81C2201/0114 ,  B81C2201/0139 ,  B81C2201/0157 ,  C25F3/12 ,  C25F3/14 ,  G01B11/2441 ,  H01L21/30617 ,  H01L21/3063 ,  H01L21/76886 ,  H01L22/12 ,  H01L31/02327 ,  H01L31/02363

Abstract: Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. Charge carriers are driven away from the surface of the semiconductor on a timescale short compared to the carrier recombination lifetime. Such methods are applied to creating a spatially varying doping profile in the semiconductor substrate, a photonic integrated circuit and an integrated photonic microfluidic circuit.

公开(公告)号：US20150368097A1

公开(公告)日：2015-12-24

申请号：US14838988

申请日：2015-08-28

Applicant: Infineon Technologies AG

Inventor： Andreas Behrendt ,  Kai-Alexander Schreiber ,  Sokratis Sgouridis ,  Martin Zgaga ,  Bernhard Winkler

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00531 ,  B81B3/0021 ,  B81B3/0094 ,  B81B2203/033 ,  B81C1/00619 ,  B81C1/00626 ,  B81C2201/0139 ,  H01L21/3063

Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.

Abstract translation: 一种用于在半导体衬底内制造至少一个空腔的方法包括：在半导体衬底的表面在至少一个预定的腔位置干蚀刻半导体衬底，以便获得至少一个临时空腔。 该方法包括在半导体衬底的表面和至少一个临时空腔的空腔表面处沉积关于随后的湿法蚀刻工艺的保护材料。 此外，该方法包括至少在至少一个临时空腔的底部的一部分处去除保护材料以暴露半导体衬底。 接着在至少一个临时腔的底部的暴露部分对半导体衬底进行电化学蚀刻。 还公开了使用这种类型的空腔形成和相应的MEMS的微机械传感器系统的制造方法。

公开(公告)号：US20130270658A1

公开(公告)日：2013-10-17

申请号：US13864762

申请日：2013-04-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Andreas Behrendt ,  Kai-Alexander Schreiber ,  Sokratis Sgouridis ,  Martin Zgaga ,  Bernhard Winkler

IPC: B81C1/00 ,  B81B3/00

CPC classification number: B81C1/00531 ,  B81B3/0021 ,  B81B3/0094 ,  B81B2203/033 ,  B81C1/00619 ,  B81C1/00626 ,  B81C2201/0139 ,  H01L21/3063

Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.

公开(公告)号：US07160750B2

公开(公告)日：2007-01-09

申请号：US10473762

申请日：2002-02-21

Applicant: Hubert Benzel ,  Heribert Weber ,  Frank Schaefer

Inventor： Hubert Benzel ,  Heribert Weber ,  Frank Schaefer

IPC: H01L21/00

CPC classification number: B81C1/00047 ,  B81B2201/0278 ,  B81C2201/0115 ,  B81C2201/0139

Abstract: A method for manufacturing a semiconductor component, such as, for example, a multilayer semiconductor component including a micromechanical component, such as, for example, a heat transfer sensor having a semiconductor substrate of silicon, and a sensor region. For inexpensive manufacture of a thermal insulation between the semiconductor substrate and the sensor region a porous layer is provided in the semiconductor component.

Abstract translation: 一种半导体部件的制造方法，例如包括微机械部件的多层半导体部件，例如具有硅的半导体基板的传热传感器和传感器区域。 为了廉价地制造半导体基板和传感器区域之间的绝热，在半导体部件中设置多孔层。

公开(公告)号：US20030127699A1

公开(公告)日：2003-07-10

申请号：US10328661

申请日：2002-12-23

Inventor： Hans Artmann ,  Thorsten Pannek

IPC: H01L021/00

CPC classification number: B81C1/0069 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0136 ,  B81C2201/0139

Abstract: In a method for producing a diaphragm sensor unit having a semiconductor material substrate, a flat diaphragm and an insulating well for thermal insulation below the diaphragm are generated, for the formation of sensor element structures for at least one sensor. The substrate, made of semiconductor material, in a specified region, which defines sensor element structures, receives a deliberately different doping from the surrounding semiconductor material, that porous semiconductor material is generated from semiconductor material sections between the regions distinguished by doping, and semiconductor material in the well region under semiconductor is rendered porous and under parts of the sensor element structure is removed and/or rendered porous.

Abstract translation: 在制造具有半导体材料基板的隔膜传感器单元的方法中，产生用于形成用于至少一个传感器的传感器元件结构的隔膜下方的平坦隔膜和隔热绝缘孔。 由限定传感器元件结构的特定区域中的由半导体材料制成的衬底接收与周围半导体材料的故意不同的掺杂，多孔半导体材料是由掺杂区域之间的半导体材料部分和半导体材料 在半导体中的阱区域被多孔化并且在传感器元件结构的部分被去除和/或变得多孔的情况下。