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公开(公告)号：US09261791B2
公开(公告)日：2016-02-16
申请号：US13833480
申请日：2013-03-15
Applicant: Infineon Technologies AG
Inventor： Thomas Walter , Andreas Behrendt
Abstract: Devices and methods are provided where photoresist is applied on a substrate and at least some regions of the photoresist are dried prior to removing a substrate from a substrate support.
Abstract translation: 提供了设备和方法，其中将光致抗蚀剂施加在基底上，并且在从衬底支撑件移除衬底之前将光致抗蚀剂的至少一些区域干燥。
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公开(公告)号：US20150368097A1
公开(公告)日：2015-12-24
申请号：US14838988
申请日：2015-08-28
Applicant: Infineon Technologies AG
Inventor： Andreas Behrendt , Kai-Alexander Schreiber , Sokratis Sgouridis , Martin Zgaga , Bernhard Winkler
CPC classification number: B81C1/00531 , B81B3/0021 , B81B3/0094 , B81B2203/033 , B81C1/00619 , B81C1/00626 , B81C2201/0139 , H01L21/3063
Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
Abstract translation: 一种用于在半导体衬底内制造至少一个空腔的方法包括：在半导体衬底的表面在至少一个预定的腔位置干蚀刻半导体衬底，以便获得至少一个临时空腔。 该方法包括在半导体衬底的表面和至少一个临时空腔的空腔表面处沉积关于随后的湿法蚀刻工艺的保护材料。 此外，该方法包括至少在至少一个临时空腔的底部的一部分处去除保护材料以暴露半导体衬底。 接着在至少一个临时腔的底部的暴露部分对半导体衬底进行电化学蚀刻。 还公开了使用这种类型的空腔形成和相应的MEMS的微机械传感器系统的制造方法。
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3.发明授权公开(公告)号：US09142444B2
公开(公告)日：2015-09-22
申请号：US13895132
申请日：2013-05-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Markus Zundel , Erwin Bacher , Andreas Behrendt , Joerg Ortner , Walter Rieger , Rudolf Zelsacher
IPC: H01L21/8242 , H01L21/762 , H01L29/06 , H01L29/40 , H01L29/78 , H01L21/8234 , H01L29/861
CPC classification number: H01L21/76224 , H01L29/0657 , H01L29/0696 , H01L29/407 , H01L29/7803 , H01L29/7804 , H01L29/7811 , H01L29/7813 , H01L29/861
Abstract: A semiconductor component comprises a semiconductor body with at least one protective trench in the semiconductor body. An insulation layer is situated at least at the bottom of the protective trench. An electrically conductive layer having a thickness D is formed on the insulation layer in the protective trench, wherein the electrically conductive layer only partly fills the protective trench.
Abstract translation: 半导体部件包括在半导体主体中具有至少一个保护沟槽的半导体本体。 绝缘层至少位于保护沟槽的底部。 在保护沟槽中的绝缘层上形成具有厚度D的导电层，其中导电层仅部分地填充保护沟槽。
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公开(公告)号：US20130270658A1
公开(公告)日：2013-10-17
申请号：US13864762
申请日：2013-04-17
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Andreas Behrendt , Kai-Alexander Schreiber , Sokratis Sgouridis , Martin Zgaga , Bernhard Winkler
CPC classification number: B81C1/00531 , B81B3/0021 , B81B3/0094 , B81B2203/033 , B81C1/00619 , B81C1/00626 , B81C2201/0139 , H01L21/3063
Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
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5.发明授权公开(公告)号：US11804432B2
公开(公告)日：2023-10-31
申请号：US17173863
申请日：2021-02-11
Applicant: Infineon Technologies AG
Inventor： Markus Zundel , Sergey Ananiev , Andreas Behrendt , Holger Doepke , Uwe Schmalzbauer , Michael Sorger , Dominic Thurmer
IPC: H01L23/528 , H01L21/768 , H01L23/532
CPC classification number: H01L23/528 , H01L21/76825 , H01L21/76837 , H01L23/5329 , H01L2924/00 , H01L2924/0002
Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20220254713A1
公开(公告)日：2022-08-11
申请号：US17173863
申请日：2021-02-11
Applicant: Infineon Technologies AG
Inventor： Markus Zundel , Sergey Ananiev , Andreas Behrendt , Holger Doepke , Uwe Schmalzbauer , Michael Sorger , Dominic Thurmer
IPC: H01L23/528 , H01L23/532 , H01L21/768
Abstract: A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.
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公开(公告)号：US09708182B2
公开(公告)日：2017-07-18
申请号：US14838988
申请日：2015-08-28
Applicant: Infineon Technologies AG
Inventor： Andreas Behrendt , Kai-Alexander Schreiber , Sokratis Sgouridis , Martin Zgaga , Bernhard Winkler
IPC: H01L21/00 , B81C1/00 , B81B3/00 , H01L21/3063
CPC classification number: B81C1/00531 , B81B3/0021 , B81B3/0094 , B81B2203/033 , B81C1/00619 , B81C1/00626 , B81C2201/0139 , H01L21/3063
Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
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公开(公告)号：US09139427B2
公开(公告)日：2015-09-22
申请号：US13864762
申请日：2013-04-17
Applicant: Infineon Technologies AG
Inventor： Andreas Behrendt , Kai-Alexander Schreiber , Sokratis Sgouridis , Martin Zgaga , Bernhard Winkler
IPC: H01L21/311 , B81C1/00 , B81B3/00 , H01L21/3063
CPC classification number: B81C1/00531 , B81B3/0021 , B81B3/0094 , B81B2203/033 , B81C1/00619 , B81C1/00626 , B81C2201/0139 , H01L21/3063
Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.
Abstract translation: 一种用于在半导体衬底内制造至少一个空腔的方法包括：在半导体衬底的表面在至少一个预定的腔位置干蚀刻半导体衬底，以便获得至少一个临时空腔。 该方法包括在半导体衬底的表面和至少一个临时空腔的空腔表面处沉积关于随后的湿法蚀刻工艺的保护材料。 此外，该方法包括至少在至少一个临时空腔的底部的一部分处去除保护材料以暴露半导体衬底。 接着在至少一个临时腔的底部的暴露部分对半导体衬底进行电化学蚀刻。 还公开了使用这种类型的空腔形成和相应的MEMS的微机械传感器系统的制造方法。
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9.发明申请POWER SEMICONDUCTOR DEVICE,POWER ELECTRONIC MODULE, AND METHOD FOR PROCESSING A POWER SEMICONDUCTOR DEVICE 审中-公开功率半导体器件，功率电子模块和用于处理功率半导体器件的方法公开(公告)号：US20150262814A1
公开(公告)日：2015-09-17
申请号：US14207685
申请日：2014-03-13
Applicant: Infineon Technologies AG
Inventor： Mathias Plappert , Eric Graetz , Andreas Behrendt , Oliver Humbel , Carsten Schaeffer , Angelika Koprowski
CPC classification number: H01L21/02126 , H01L21/02282 , H01L21/02318 , H01L23/296 , H01L23/3171 , H01L23/564 , H01L24/05 , H01L29/0619 , H01L29/404 , H01L29/66325 , H01L29/73 , H01L29/7393 , H01L2224/04042 , H01L2224/4847 , H01L2924/13055 , H01L2924/181 , H01L2924/00
Abstract: A power semiconductor device in accordance with various embodiments may include: a semiconductor body; and a passivation layer disposed over at least a portion of the semiconductor body, wherein the passivation layer includes an organic dielectric material having a water uptake of less than or equal to 0.5 wt % in saturation.
Abstract translation: 根据各种实施例的功率半导体器件可以包括：半导体本体; 以及设置在所述半导体本体的至少一部分上的钝化层，其中所述钝化层包括具有小于或等于饱和度的0.5重量％的吸水率的有机介电材料。
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公开(公告)号：US20140272705A1
公开(公告)日：2014-09-18
申请号：US13833480
申请日：2013-03-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor： Thomas Walter , Andreas Behrendt
IPC: G03F7/16
Abstract: Devices and methods are provided where photoresist is applied on a substrate and at least some regions of the photoresist are dried prior to removing a substrate from a substrate support.
Abstract translation: 提供了设备和方法，其中将光致抗蚀剂施加在基底上，并且在从衬底支撑件移除衬底之前将光致抗蚀剂的至少一些区域干燥。
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