公开(公告)号：US09742370B2

公开(公告)日：2017-08-22

申请号：US15350431

申请日：2016-11-14

Applicant: Cirrus Logic, Inc.

Inventor： Ullas Pazhayaveetil ,  Jeffrey May ,  Anu Chakravarty ,  Gautham D. Kamath ,  John C. Tucker ,  Christian Larsen

IPC: H03G3/00 ,  G01R27/26 ,  G01R21/06 ,  G06F1/32 ,  H02M3/158 ,  H03F3/187 ,  H03F3/217

CPC classification number: H02M3/158 ,  G01R21/06 ,  G01R27/2611 ,  G06F1/3203 ,  H02M3/156 ,  H03F3/187 ,  H03F3/2175 ,  H03G3/004

Abstract: Audio amplification may be improved by controlling an audio amplifier based on the audio signal being amplified. For example, when the audio signal level increases or decreases, a boost voltage provided to an audio amplifier by a boost converter may also be increased or decreased. In another example, when the audio signal level decrease below a certain level, the audio amplifier may be switched from amplifying the audio signal with a boost converter input to amplifying the audio signal with a low voltage input. Control of the audio amplifier may be implemented in a digital boost converter controller coupled to the boost converter and/or the audio amplifier.

公开(公告)号：US09674626B1

公开(公告)日：2017-06-06

申请号：US14454576

申请日：2014-08-07

Applicant: Cirrus Logic, Inc.

Inventor： Samuel Ponvarma Ebenezer ,  Seth Suppappola ,  Clifton Cordes

IPC: H04R29/00 ,  G01R25/00 ,  G01R31/3167 ,  G01R31/317 ,  G01R31/319

CPC classification number: H04R29/006 ,  G01R25/00 ,  G01R31/3167 ,  G01R31/31701 ,  G01R31/31901 ,  G01R31/31905 ,  H04R1/083 ,  H04R1/326 ,  H04R3/005 ,  H04R29/004 ,  H04R29/005

Abstract: Test apparatus measuring relative frequency response of first and second microphones includes a rotatable carrier. First and second microphones are sealingly clamped against a mounting surface of the carrier aligned with first and second apertures therein, such apertures lying equidistant from, and on opposite sides of, the carrier's axis of rotation. The carrier initially positions the first microphone closest to an audible signal source, and the responses of the microphones to an audible excitation signal are measured. The carrier is rotated 180 degrees, and the measurements are repeated. Elongated strips of gasket material are used to align the microphones and to form a seal with the carrier. When microphones are mounted deep within an audio device, the audio device is sealingly clamped against a mounting plate, sequentially aligning the mounting plate aperture with first and second apertures of the audio device housing corresponding to first and second microphones disposed therein.

公开(公告)号：US09648414B1

公开(公告)日：2017-05-09

申请号：US14169946

申请日：2014-01-31

Applicant: Cirrus Logic, Inc.

Inventor： Tejasvi Das ,  Daniel John Allen

IPC: H04R3/00 ,  H03G3/00 ,  G06F1/00 ,  H04M3/00 ,  H04R1/40 ,  H03K3/00 ,  G11B20/14 ,  G06F13/42 ,  G11B20/10

CPC classification number: H04R3/00 ,  G06F1/00 ,  G06F13/42 ,  G11B20/10527 ,  G11B20/1403 ,  H03G3/00 ,  H03G3/348 ,  H03K3/00 ,  H04M3/002 ,  H04R1/403 ,  H04R1/406 ,  Y02D10/14 ,  Y02D10/151

Abstract: Responsive to the absence of a reference clock input signal to a clock conditioning circuit for generating a desired clock signal for synchronizing components of an audio signal path, a controller may cause the signal path to receive at the clock input a substitute clock signal in the absence of the reference clock input signal and may modify one or more parameters of the signal path in order to perform one or more of the following: (i) reduce the presence of audio artifacts in the output signal caused by the absence of the reference clock input signal; (ii) power down at least one component of the signal path to reduce power consumed by the signal path; (iii) continue to operate the signal path with the substitute clock signal; and (iv) transition the signal path to a mute condition or a zero volume condition.

公开(公告)号：US09648410B1

公开(公告)日：2017-05-09

申请号：US14207053

申请日：2014-03-12

Applicant: Cirrus Logic, Inc.

Inventor： Robert George Kratsas ,  Roy Scott Kaller

IPC: G10K11/16 ,  H04R1/10 ,  H04R3/00

CPC classification number: H04R1/1041 ,  G10K11/17813 ,  G10K11/1783 ,  G10K2210/1081 ,  H04R2430/01

Abstract: A headphone earbud may include a sensor to determine characteristics of an environment around the headphone earbud. The sensor may be integrated with the headphone earbud to measure a distance from the headphone earbud to a user's ear drum. This distance may be used to control an audio output of the headphone earbud, such as through an adaptive noise cancellation (ANC) algorithm. Control over the audio output may be performed by an audio integrated circuit (IC) integrated within the headphone earbud or within a mobile device coupled to the headphone earbud.

公开(公告)号：US09635480B2

公开(公告)日：2017-04-25

申请号：US15195785

申请日：2016-06-28

Applicant: Cirrus Logic, Inc.

Inventor： Antonio John Miller ,  Jie Su

IPC: H04R29/00 ,  G06F3/16 ,  H04R3/00

CPC classification number: H04R29/001 ,  G06F3/165 ,  H04R3/00 ,  H04R3/005 ,  H04R2410/05 ,  H04R2460/01 ,  H04R2499/11

Abstract: A speaker impedance may be determined by monitoring a voltage and/or current of the speaker. The calculated impedance may be used to determine whether the mobile device containing the speaker is on- or off-ear. The impedance determination may be assisted by applying a test tone low level signal to the speaker. The test tone may be inaudible to the user, but used to determine an impedance of the speaker at the frequency of the test tone. The impedance at that test tone may be used to determine whether a resonance frequency of the speaker is at a frequency corresponding to an on- or off-ear condition. The measured speaker impedance may be provided as feedback to an adaptive noise cancellation (ANC) algorithm to adjust the output at the speaker. For example, when the mobile device is removed from the user's ear, the ANC algorithm may be disabled.

公开(公告)号：US09633156B1

公开(公告)日：2017-04-25

申请号：US15047033

申请日：2016-02-18

Applicant: Cirrus Logic, Inc.

Inventor： Bhoodev Kumar ,  Saurabh Singh ,  Lei Zhu

IPC: H03K3/00 ,  G06F17/50

CPC classification number: G06F17/505 ,  G01R31/318541 ,  H03K3/012

Abstract: In accordance with embodiments of the present disclosure, a multi-bit pulsed latch circuit for an integrated circuit design system may include a pulse generator and a plurality of latches. The pulse generator may be configured to generate pulses. The plurality of latches may operate as storage elements and are coupled to the pulse generator in a manner so that the multi-bit pulsed latch circuit provides functionality of at least two flip flop elements, wherein the multi-bit pulsed latch circuit can replace the at least two flip flop elements that normally would be used by the integrated circuit design system.

公开(公告)号：US09628002B2

公开(公告)日：2017-04-18

申请号：US14208277

申请日：2014-03-13

Applicant: Cirrus Logic, Inc.

Inventor： Branislav Pjetar ,  Marc J. Kobayashi

IPC: H02P27/00 ,  H02P6/12 ,  G01R31/34 ,  H02P6/182 ,  G01R31/42

CPC classification number: H02P6/12 ,  G01R31/343 ,  G01R31/42 ,  H02P6/182

Abstract: The system contains a controller unit comprising a memory device, a processing unit, and at least one analog-to-digital converter. A power stage has a plurality of switches, wherein the power stage receives a control signal from the control circuit and a power signal from a power source. The power stage drives two windings of the set of three stator windings to rotate a rotor and maintains one stator winding of the three stator windings undriven. The memory device stores a plurality of values for the driven current and a plurality of demodulated undriven winding voltages. The processing unit compares the plurality of values and periodically calculates a rotor sextant while the rotor rotates. The processing unit compares at least two demodulated undriven winding voltage values corresponding to at least two current values within the rotor sextant to calculate the rotor sextant parity and verify the calculation of the rotor sextant.

公开(公告)号：US09596537B2

公开(公告)日：2017-03-14

申请号：US14483659

申请日：2014-09-11

Applicant: Cirrus Logic, Inc.

Inventor： Ku He ,  Tejasvi Das ,  John L. Melanson ,  Aniruddha Satoskar

IPC: H03G3/00 ,  H04R3/00 ,  H03G3/20 ,  H04R3/04 ,  H03G3/30 ,  H03F99/00

CPC classification number: H04R3/00 ,  H03G3/00 ,  H03G3/20 ,  H03G3/3005 ,  H03G3/3089 ,  H04R3/04 ,  H04R2430/00

Abstract: In accordance with embodiments of the present disclosure, a control circuit may be configured to, responsive to an indication to switch between gain modes of a signal path having an analog path portion and a digital signal path portion, switch a selectable analog gain of the analog path portion between a first analog gain and a second analog gain, switch a selectable digital gain of the digital signal path portion between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain, and control an analog response of the signal path to reduce the occurrence of audio artifacts present in the output signal as a result of the switch between gain modes of the signal path.A signal path may have an analog path portion and a digital signal path portion. The digital portion may have a selectable digitally-controlled gain and may be configured to convert a digital audio input signal into an analog input signal in conformity with the selectable digitally-controlled gain, the digital signal path portion comprising a modulator including a forward path and a feedback path. The forward path may include a loop filter for generating a filtered signal responsive to the digital audio input signal and a feedback signal, a quantizer responsive to the filtered signal for generating a quantized signal, and a first gain element configured to apply the selectable digitally-controlled gain to a signal within the forward path. The feedback path may be configured to generate the feedback signal responsive to the quantized signal, the feedback path including a second gain element having a gain inversely proportional to the selectable digitally-controlled gain.

Abstract translation: 信号路径可以具有模拟路径部分和数字信号路径部分。 数字部分可以具有可选择的数字控制的增益，并且可以被配置为将数字音频输入信号转换成符合可选数字控制的增益的模拟输入信号，数字信号路径部分包括调制器，包括前向路径和 反馈路径。 正向路径可以包括环路滤波器，用于响应于数字音频输入信号和反馈信号产生经滤波的信号，响应于经滤波的信号产生量化信号的量化器，以及第一增益元件，被配置为将可选择的数字 - 控制增益到正向路径内的信号。 反馈路径可以被配置为响应于量化信号产生反馈信号，反馈路径包括具有与可选数字控制增益成反比的增益的第二增益元件。

公开(公告)号：US09577587B2

公开(公告)日：2017-02-21

申请号：US14706624

申请日：2015-05-07

Applicant: Cirrus Logic, Inc.

Inventor： Siddharth Maru ,  Eric J. King

IPC: H03F1/08 ,  H03F3/217 ,  G05F1/575 ,  H02M3/158 ,  H03F1/02 ,  H03F3/181

CPC classification number: H03F1/083 ,  G05F1/575 ,  H02M3/158 ,  H03F1/0277 ,  H03F3/181 ,  H03F3/217 ,  H03F3/2178 ,  H03F2200/03 ,  H03F2200/372

Abstract: A power converter may include a power inductor, a plurality of switches arranged to sequentially operate in a plurality of switch configurations, an output for producing the output voltage, wherein a first switch is coupled to a first output terminal of the output and a second switch is coupled to a second output terminal of the output, and a linear amplifier coupled to the output. The controller may be configured to, in a linear amplifier mode of the power stage, enable the linear amplifier to transfer electrical energy from an input source of the power stage to the load, and in at least one mode of the power stage other than the linear amplifier mode, sequentially apply switch configurations from the plurality of switch configurations to selectively activate or deactivate each of the plurality of switches in order to transfer the electrical energy from the input source to the load.

Abstract translation: 功率转换器可以包括功率电感器，多个开关，被布置成顺序地以多个开关配置工作，用于产生输出电压的输出，其中第一开关耦合到输出端的第一输出端，​​第二开关 耦合到输出的第二输出端，以及耦合到输出的线性放大器。 控制器可以被配置为在功率级的线性放大器模式中使得线性放大器能够将电能从功率级的输入源传输到负载，并且在功率级的至少一种模式中，除了 线性放大器模式，顺序地从多个开关配置施加开关配置，以选择性地激活或去激活多个开关中的每一个，以将电能从输入源传输到负载。

公开(公告)号：US09532139B1

公开(公告)日：2016-12-27

申请号：US13721832

申请日：2012-12-20

Applicant: Cirrus Logic, Inc.

Inventor： Yang Lu ,  Dayong Zhou ,  Jon D. Hendrix ,  Jeffrey Alderson

IPC: H04R29/00 ,  H04R3/00

CPC classification number: G10K11/178 ,  G10K11/16 ,  G10K2210/1081 ,  G10K2210/503 ,  H04R1/1083 ,  H04R3/005 ,  H04R2410/05 ,  H04R2460/01 ,  H04R2499/11

Abstract: A frequency domain method and system for online self-calibrating microphone frequency amplitude response based on noise floor (minima) tracking are disclosed. A cellular telephone or other system with dual microphones may self-calibrate itself on-the-fly. The system selects one of the microphones as a reference and calibrates the frequency response of the two microphones using the first microphone as a reference, so that they have a matched frequency amplitude response. To achieve this on-the-fly calibration, the system uses background noise for calibration purposes. The signal power spectra of the noise minima at the two microphones is used to calibrate the respective microphone frequency response. The system may then adapt the frequency amplitude responses of the two microphones so that the power spectral density from each microphone matches the other, and the system is then calibrated. This calibration could occur any time the device is receiving a noise minima and could be done continuously as the device is being used.

Abstract translation: 公开了一种基于噪声本底（最小值）跟踪的在线自校准麦克风频率振幅响应的频域方法和系统。 具有双麦克风的蜂窝电话或其他系统可以自动校准自身。 该系统选择一个麦克风作为参考，并使用第一麦克风作为参考来校准两个麦克风的频率响应，使得它们具有匹配的频率幅度响应。 为了实现这个动态校准，系统使用背景噪声进行校准。 两个麦克风的噪声最小值的信号功率谱用于校准相应的麦克风频率响应。 然后，系统可以适应两个麦克风的频率振幅响应，使得来自每个麦克风的功率谱密度与另一个相匹配，然后校准系统。 该校准可能在设备接收噪声最小值时发生，并且可以在使用设备时连续进行。