公开(公告)号：US09293588B1

公开(公告)日：2016-03-22

申请号：US14471861

申请日：2014-08-28

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Hong He ,  Ali Khakifirooz

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/161 ,  H01L21/02381 ,  H01L21/02532 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/41783 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7842 ,  H01L29/785 ,  H01L29/7851

Abstract: A gate cavity is formed exposing a portion of a silicon fin by removing a sacrificial gate structure that straddles the silicon fin. An epitaxial silicon germanium alloy layer is formed within the gate cavity and on the exposed portion of the silicon fin. Thermal mixing or thermal condensation is performed to convert the exposed portion of the silicon fin into a silicon germanium alloy channel portion which is laterally surrounded by silicon fin portions. A functional gate structure is formed within the gate cavity providing a finFET structure having a silicon germanium alloy channel portion which is laterally surrounded by silicon fin portions.

公开(公告)号：US09269575B2

公开(公告)日：2016-02-23

申请号：US14042889

申请日：2013-10-01

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Hong He ,  Ali Khakifirooz

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L21/02647 ,  H01L21/02041 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming a semiconductor device includes forming an insulator layer over a substrate; opening a trench in the insulator layer so as to expose one or more semiconductor structures formed on the substrate; forming a protective layer on sidewalls of the trench; subjecting the substrate to a precleaning operation in preparation for epitaxial semiconductor formation, wherein the protective layer prevents expansion of the sidewalls of the trench as a result of the precleaning operation; and forming epitaxial semiconductor material within the trench and over the exposed one or more semiconductor structures.

Abstract translation: 一种形成半导体器件的方法包括在衬底上形成绝缘体层; 在所述绝缘体层中打开沟槽，以暴露形成在所述衬底上的一个或多个半导体结构; 在沟槽的侧壁上形成保护层; 对衬底进行预清洗操作以准备外延半导体形成，其中由于预清洗操作，保护层防止沟槽的侧壁膨胀; 以及在所述沟槽内并在所暴露的一个或多个半导体结构之上形成外延半导体材料。

公开(公告)号：US09252243B2

公开(公告)日：2016-02-02

申请号：US14175441

申请日：2014-02-07

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L29/4966 ,  H01L21/0337 ,  H01L21/823431 ,  H01L29/0847 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: In one embodiment, a semiconductor device is provided that includes a gate structure present on a channel portion of a fin structure. The gate structure includes a dielectric spacer contacting a sidewall of a gate dielectric and a gate conductor. Epitaxial source and drain regions are present on opposing sidewalls of the fin structure, wherein surfaces of the epitaxial source region and the epitaxial drain region that is in contact with the sidewalls of the fin structure are aligned with an outside surface of the dielectric spacer. In some embodiments, the dielectric spacer, the gate dielectric, and the gate conductor of the semiconductor device are formed using a single photoresist mask replacement gate sequence.

Abstract translation: 在一个实施例中，提供一种半导体器件，其包括存在于鳍结构的沟道部分上的栅极结构。 栅极结构包括与栅极电介质的侧壁和栅极导体接触的电介质间隔物。 外延源极和漏极区域存在于鳍状结构的相对的侧壁上，其中与翅片结构的侧壁接触的外延源区域和外延漏极区域的表面与电介质间隔物的外表面对齐。 在一些实施例中，使用单个光致抗蚀剂掩模替换栅极序列形成半导体器件的电介质间隔物，栅极电介质和栅极导体。

公开(公告)号：US20150332977A1

公开(公告)日：2015-11-19

申请号：US14808921

申请日：2015-07-24

Applicant: International Business Machines Corporation

Inventor： Kangguo Cheng ,  Hong He ,  Chiahsun Tseng ,  Yunpeng Yin

IPC: H01L21/84 ,  H01L29/66

CPC classification number: H01L21/845 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/7831

Abstract: A silicon germanium alloy layer is formed on a semiconductor material layer by epitaxy. An oxygen impermeable layer is formed on the silicon germanium alloy layer. The oxygen impermeable layer and the silicon germanium alloy layer are patterned to form stacks of a silicon germanium alloy fin and an oxygen impermeable cap. A shallow trench isolation structure is formed by deposition, planarization, and recessing or an oxygen permeable dielectric material. An oxygen impermeable spacer is formed around each stack of a silicon germanium alloy fin and an oxygen impermeable cap. A thermal oxidation process is performed to convert a lower portion of each silicon germanium alloy fin into a silicon germanium oxide. During the thermal oxidation process, germanium atoms diffuse into unoxidized portions of the silicon germanium alloy fins to increase the germanium concentration therein.

Abstract translation: 通过外延在半导体材料层上形成硅锗合金层。 在硅锗合金层上形成不透氧层。 将不透氧层和硅锗合金层图案化以形成硅锗合金翅片和不透氧盖的叠层。 通过沉积，平坦化和凹陷形成浅沟槽隔离结构或透氧介电材料。 在硅锗合金翅片和不透氧盖的每个堆叠周围形成不透氧隔离物。 进行热氧化处理以将每个硅锗合金翅片的下部转换成硅氧化锗。 在热氧化过程中，锗原子扩散到硅锗合金翅片的未氧化部分，以增加其中的锗浓度。

公开(公告)号：US20150243513A1

公开(公告)日：2015-08-27

申请号：US14697306

申请日：2015-04-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L21/308 ,  H01L21/3065

CPC classification number: H01L21/3086 ,  H01L21/0338 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/32136 ,  H01L29/66545 ,  H01L29/66795

Abstract: Methods and structures for fabricating fins for multigate devices are disclosed. In accordance with one method, a plurality of sidewalls are formed in or on a plurality of mandrels over a semiconductor substrate such that each of the mandrels includes a first sidewall composed of a first material and a second sidewall composed of a second material that is different from the first material. The first sidewall of a first mandrel of the plurality of mandrels is selectively removed. In addition, a pattern composed of remaining sidewalls of the plurality of sidewalls is transferred onto an underlying layer to form a hard mask in the underlying layer. Further, the fins are formed by employing the hard mask and etching semiconducting material in the substrate.

Abstract translation: 公开了用于制造用于多设备的散热片的方法和结构。 根据一种方法，多个侧壁形成在半导体衬底上的多个心轴上或上方，使得每个心轴包括由第一材料组成的第一侧壁和由不同的第二材料组成的第二侧壁 从第一个材料。 选择性地去除多个心轴中的第一心轴的第一侧壁。 此外，由多个侧壁的剩余侧壁组成的图案被转移到下层上，以在下层中形成硬掩模。 此外，通过在基板中采用硬掩模和蚀刻半导体材料来形成翅片。

公开(公告)号：US20150236159A1

公开(公告)日：2015-08-20

申请号：US14184229

申请日：2014-02-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Junli Wang ,  Yongan Xu ,  Yunpeng Yin

IPC: H01L29/78 ,  H01L21/306 ,  H01L29/49 ,  H01L21/762 ,  H01L29/06 ,  H01L21/311 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L29/66795 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/28088 ,  H01L21/31122 ,  H01L21/76224 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/785

Abstract: A method of forming a semiconductor device that includes forming a sacrificial gate structure on a channel portion of a fin structure, wherein the angle at the intersection of the sidewall of the sacrificial gate structure and an upper surface of the channel portion of the fin structure is obtuse. Epitaxial source and drain region structures are formed on a source region portion and a drain region portion of the fin structure. At least one dielectric material is formed on the sidewall of the sacrificial gate structure. The sacrificial gate structure may be removed to provide an opening to the channel portion of the fin structure. A function gate structure is formed in the opening. At least one angle defined by the intersection of a sidewall of the functional gate structure and an upper surface of the channel portion of the fin structure is obtuse.

Abstract translation: 一种形成半导体器件的方法，包括在鳍结构的沟道部分上形成牺牲栅极结构，其中牺牲栅极结构的侧壁与鳍结构的沟道部分的上表面的交点处的角度为 钝。 外延源极和漏极区结构形成在鳍结构的源极区域和漏极区域部分上。 在牺牲栅极结构的侧壁上形成至少一种电介质材料。 可以去除牺牲栅极结构以为鳍结构的通道部分提供开口。 在开口中形成功能门结构。 由功能门结构的侧壁与翅片结构的通道部分的上表面的交点限定的至少一个角度是钝的。

公开(公告)号：US20150179769A1

公开(公告)日：2015-06-25

申请号：US14139121

申请日：2013-12-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L29/66 ,  H01L21/308 ,  H01L21/033

CPC classification number: H01L21/3086 ,  H01L21/0338 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/32136 ,  H01L29/66545 ,  H01L29/66795

Abstract: Methods and structures for fabricating fins for multigate devices are disclosed. In accordance with one method, a plurality of sidewalls are formed in or on a plurality of mandrels over a semiconductor substrate such that each of the mandrels includes a first sidewall composed of a first material and a second sidewall composed of a second material that is different from the first material. The first sidewall of a first mandrel of the plurality of mandrels is selectively removed. In addition, a pattern composed of remaining sidewalls of the plurality of sidewalls is transferred onto an underlying layer to form a hard mask in the underlying layer. Further, the fins are formed by employing the hard mask and etching semiconducting material in the substrate.

公开(公告)号：US09064901B1

公开(公告)日：2015-06-23

申请号：US14139121

申请日：2013-12-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L29/66 ,  H01L21/033 ,  H01L21/308

CPC classification number: H01L21/3086 ,  H01L21/0338 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/32136 ,  H01L29/66545 ,  H01L29/66795

Abstract: Methods and structures for fabricating fins for multigate devices are disclosed. In accordance with one method, a plurality of sidewalls are formed in or on a plurality of mandrels over a semiconductor substrate such that each of the mandrels includes a first sidewall composed of a first material and a second sidewall composed of a second material that is different from the first material. The first sidewall of a first mandrel of the plurality of mandrels is selectively removed. In addition, a pattern composed of remaining sidewalls of the plurality of sidewalls is transferred onto an underlying layer to form a hard mask in the underlying layer. Further, the fins are formed by employing the hard mask and etching semiconducting material in the substrate.

Abstract translation: 公开了用于制造用于多设备的散热片的方法和结构。 根据一种方法，多个侧壁形成在半导体衬底上的多个心轴上或上方，使得每个心轴包括由第一材料组成的第一侧壁和由不同的第二材料组成的第二侧壁 从第一个材料。 选择性地去除多个心轴中的第一心轴的第一侧壁。 此外，由多个侧壁的剩余侧壁组成的图案被转移到下层上，以在下层中形成硬掩模。 此外，通过在基板中采用硬掩模和蚀刻半导体材料来形成翅片。

公开(公告)号：US09059002B2

公开(公告)日：2015-06-16

申请号：US14011186

申请日：2013-08-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  Renesas Electronics Corporation

Inventor： Hong He ,  Shogo Mochizuki ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L29/66 ,  H01L29/04 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/02271 ,  H01L21/0257 ,  H01L21/30604 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785 ,  H01L29/7851

Abstract: Semiconductor devices having non-merged fin extensions and methods for forming the same. Methods for forming semiconductor devices include forming fins on a substrate; forming a dummy gate over the fins, leaving a source and drain region exposed; etching the fins below a surface level of a surrounding insulator layer; and epitaxially growing fin extensions from the etched fins.

Abstract translation: 具有非合并翅片延伸的半导体器件及其形成方法。 用于形成半导体器件的方法包括在衬底上形成翅片; 在翅片上形成虚拟栅极，留下源极和漏极区域暴露; 在低于周围绝缘体层的表面水平面处蚀刻散热片; 并从蚀刻的翅片外延生长翅片延伸部分。

公开(公告)号：US09053965B2

公开(公告)日：2015-06-09

申请号：US14036759

申请日：2013-09-25

Applicant: International Business Machines Corporation

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L27/088 ,  H01L29/66 ,  H01L27/12 ,  H01L21/8234 ,  H01L21/84

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66477 ,  H01L29/66545

Abstract: A transistor device and a method for forming a fin-shaped field effect transistor (FinFET) device, with the channel portion of the fins on buried silicon oxide, while the source and drain portions of the fins on silicon. An example method includes receiving a wafer with a silicon layer electrically isolated from a silicon substrate by a buried oxide (BOX) layer. The BOX layer is in physical contact with the silicon layer and the silicon substrate. The method further comprises implanting a well in the silicon substrate and forming vertical sources and drains over the well between dummy gates. The vertical sources and drains extend through the BOX layer, fins, and a portion of the dummy gates.

Abstract translation: 一种用于形成鳍状场效应晶体管（FinFET）器件的晶体管器件和方法，其中鳍状物的沟道部分在掩埋的氧化硅上，而硅片上的鳍片的源极和漏极部分。 一种示例性方法包括接收具有通过掩埋氧化物（BOX）层与硅衬底电隔离的硅层的晶片。 BOX层与硅层和硅衬底物理接触。 该方法还包括在硅衬底中注入阱并在阱之间形成垂直源和漏极。 垂直的源极和漏极延伸穿过BOX层，鳍片和一部分虚拟栅极。