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公开(公告)号：US09651958B2
公开(公告)日：2017-05-16
申请号：US15131913
申请日：2016-04-18
Applicant: STMicroelectronics International N.V.
Inventor： Nitin Bansal , Saurabh Kumar Singh , Hemant Shukla
Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.
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272.发明申请公开(公告)号：US20170123202A1
公开(公告)日：2017-05-04
申请号：US15401681
申请日：2017-01-09
Inventor： Benedetto Vigna , Marco Ferrera , Sonia Costantini , Marco Salina
CPC classification number: G02B26/0841 , B81B3/0045 , B81B2201/042 , B81B2203/0154 , B81C1/00198 , G02B27/1006 , H02N1/002 , H02N1/006 , H04N9/3129 , H04N9/3135 , Y10T29/49002
Abstract: An electrostatically actuated oscillating structure includes a first stator subregion, a second stator subregion, a first rotor subregion and a second rotor subregion. Torsional elastic elements mounted to the first and second rotor subregions define an axis of rotation. A mobile element is coupled to the torsional elastic elements. The stator subregions are electrostatically coupled to respective regions of actuation on the mobile element. The stator subregions exhibit an element of structural asymmetry such that the electrostatic coupling surface between the first stator subregion and the first actuation region differs from the electrostatic coupling surface between the second stator subregion and the second actuation region.
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273.发明授权公开(公告)号：US09634698B2
公开(公告)日：2017-04-25
申请号：US14949453
申请日：2015-11-23
Applicant: STMicroelectronics International N.V.
Inventor： Patrik Arno
CPC classification number: H04B1/0475 , H03F1/0238 , H03F1/3241 , H03F1/3247 , H03F1/3258 , H03F3/19 , H03F3/24 , H03F2200/102 , H03F2200/336 , H03F2200/504 , H03F2201/3212 , H03F2201/3233 , H04B2001/0425
Abstract: The output of a Radio Frequency (RF) Power Amplifier (PA) is sampled and down-converted, and the amplitude envelope of the baseband feedback signal is extracted. This is compared to the envelope of a transmission signal, and the envelope tracking modulation of the RF PA supply voltage is adaptively pre-distorted to achieve a constant ISO-Gain (and phase) in the RF PA. In particular, a nonlinear function is interpolated from a finite number gain values calculated from the feedback and transmission signals. This nonlinear function is then used to pre-distort the transmission signal envelope, resulting in a constant gain at the RF PA over a wide range of supply voltage values. Since the gains are calculated from a feedback signal, the pre-distortion may be recalculated at event triggers, such as an RF frequency change.
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公开(公告)号：US09627967B2
公开(公告)日：2017-04-18
申请号：US14222430
申请日：2014-03-21
Applicant: STMicroelectronics International N.V.
Inventor： Ranajay Mallik , Jitendra Jain
CPC classification number: H02M3/156 , H02M2001/0025 , Y10T307/406
Abstract: One embodiment of a power management system includes a reservoir configured to collect energy. The system also includes a voltage regulator coupled to the reservoir via an input terminal and configured to convert the energy to an output voltage via an output terminal when enabled. A threshold detector is coupled to the reservoir and is configured to sense the energy and enable the voltage regulator when the energy exceeds a threshold. The system further includes a feedback circuit coupled between the output terminal and the threshold detector, and configured to feedback the output voltage to the threshold detector to compensate for a voltage drop across the threshold detector due to an output current drawn by the load.
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公开(公告)号：US09606180B2
公开(公告)日：2017-03-28
申请号：US14270935
申请日：2014-05-06
Applicant: STMicroelectronics International N.V.
Inventor： Swapnil Bahl , Shray Khullar
IPC: G01R31/3185 , G01R31/3177 , G11C29/32 , G06F11/25 , G11C29/34
CPC classification number: G11C29/32 , G01R31/3177 , G01R31/318541 , G01R31/318547 , G06F11/25 , G11C29/34 , G11C2029/3202
Abstract: An integrated circuit (IC) having a scan compression architecture includes decompression logic coupled between test access input and a block of IC elements (e.g. flip-flops) coupled together to define a plurality of scan paths. The block of IC elements includes an initial data selector at an initial position of each of the scan paths, and an additional data selector downstream within at least one of the scan paths and configured to reconfigure an order of the IC elements within the at least one scan path. Compression logic is coupled between the block of IC elements and a test access output.
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Patent Agency Ranking
公开(公告)号：US09601185B2
公开(公告)日：2017-03-21
申请号：US14478477
申请日：2014-09-05
Applicant: STMicroelectronics International N.V.
Inventor： Jacques Talayssat
IPC: G11C11/419 , G11C8/10 , H01L27/11 , H01L21/8238 , H01L21/761 , H01L27/092 , H01L27/108
CPC classification number: G11C11/419 , G11C8/10 , H01L21/761 , H01L21/823892 , H01L27/0928 , H01L27/10894 , H01L27/10897 , H01L27/1104
Abstract: An integrated circuit includes first and second circuit parts that may be arranged close to one another in a single semiconducting substrate. The circuit may use a deep doping well for reducing digital noise, and may implement a sleep mode for reducing power consumption. This circuit may have a random access memory, and may be a radio communication system-on-chip device. The integrated circuit may advantageously be used within a mobile communication apparatus.
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公开(公告)号：US09590602B2
公开(公告)日：2017-03-07
申请号：US14304357
申请日：2014-06-13
Applicant: STMicroelectronics International N.V.
Inventor： Shishir Kumar , Tanmoy Roy
Abstract: According to an embodiment, a method of generating a clock pulse includes receiving a leading edge at a clock input at a time when an enable signal is active, generating an edge at a clock output based on the received leading edge at the clock input, latching a logic value corresponding to the edge at the clock output, preventing changes at the clock input from affecting the latched logic value after the logic value is latched, resetting the latched logic value after a first delay time, and maintaining the reset logic value until a second edge is received at the clock input. The second edge at the clock input matches the leading edge at the clock input.
Abstract translation: 根据实施例，一种产生时钟脉冲的方法包括在使能信号有效时在时钟输入端处接收前沿，在时钟输出端基于接收到的前沿产生时钟输出的边沿，锁存 对应于时钟输出端的逻辑值，防止在逻辑值被锁存之后时钟输入的变化影响锁存的逻辑值，在第一延迟时间之后复位锁存的逻辑值，并保持复位逻辑值直到 在时钟输入端接收第二个边沿。 时钟输入端的第二个边沿与时钟输入端的前沿匹配。
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公开(公告)号：US09588538B2
公开(公告)日：2017-03-07
申请号：US14675309
申请日：2015-03-31
Inventor： Jean-Pierre Blanc , Pratap Narayan Singh
Abstract: A reference voltage generation circuit, including a first current source in series with a first bipolar transistor; a second current source in series with a first resistor; a third current source in series with a second bipolar transistor, the third current source being assembled as a current mirror with the first current source; a second resistor between the base of the second bipolar transistor and the junction point between the current source and the first resistor; and a fourth current source in series with a third resistor, the junction point between the fourth current source and the third resistor defining a reference voltage terminal.
Abstract translation: 参考电压产生电路，包括与第一双极晶体管串联的第一电流源; 与第一电阻器串联的第二电流源; 与第二双极晶体管串联的第三电流源，所述第三电流源被组装为具有所述第一电流源的电流镜; 第二电阻器，位于第二双极晶体管的基极与电流源与第一电阻之间的连接点之间; 以及与第三电阻器串联的第四电流源，所述第四电流源和所述第三电阻器之间的连接点限定参考电压端子。
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279.发明授权RFID transponder device and method for production of an RFID transponder device 有权RFID应答器设备和用于生产RFID应答器设备的方法公开(公告)号：US09576237B2
公开(公告)日：2017-02-21
申请号：US14903584
申请日：2014-06-12
Applicant: STMicroelectronics International N.V.
Inventor： Vinko Kunc , Anton Stern , Kosta Kovacic , Albin Pevec , Maksimiljan Stiglic
IPC: G06K19/06 , G06K19/077
CPC classification number: G06K19/07773 , G06K19/0715 , G06K19/07749 , G06K19/0775
Abstract: An RFID transponder device has antenna terminals for coupling an antenna system to the device. A transmitter and a receiver are coupled to the antenna terminals. The device has at least one damping resistance connected to at least one of the antenna terminals. The at least one damping resistance is connected, depending on a voltage swing at the antenna terminals during a transmission burst period, either together with a serially connected switch in parallel to the antenna terminals that are coupled to the receiver, or together with a parallel connected switch between one of the antenna terminals and a terminal of the transmitter. A damping control is configured to activate the at least one damping resistance during a damping period after the transmission burst period by controlling the respective switch.
Abstract translation: RFID应答器设备具有用于将天线系统耦合到设备的天线端子。 发射器和接收器耦合到天线端子。 该装置具有连接到至少一个天线端子的至少一个阻尼电阻。 至少一个阻尼电阻根据传输脉冲串期间天线端子处的电压摆幅而连接，或者连接到与接收器耦合的天线端子并联连接的串联开关，或者与并联连接 在天线终端之一和发射机的终端之间切换。 阻尼控制被配置为通过控制相应的开关来在传输脉冲串周期之后的阻尼时段期间激活至少一个阻尼电阻。
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公开(公告)号：US09559708B2
公开(公告)日：2017-01-31
申请号：US15229322
申请日：2016-08-05
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri
CPC classification number: H03L7/0891 , H03L7/099
Abstract: Disclosed herein is a circuit including a phase frequency detector (PFD) configured to compare phases of an input signal and a feedback signal, and to generate first and second control signals as a function of that comparison. An attenuation circuit includes a capacitor coupled in series between a node and a switching node, and is configured to charge the capacitor and disconnect the switching node from ground based on assertion of the first control signal, and discharge the capacitor and connect the switching node to ground based on assertion of the second control signal.
Abstract translation: 这里公开了一种电路，其包括被配置为比较输入信号和反馈信号的相位的相位频率检测器（PFD），并且作为该比较的函数产生第一和第二控制信号。 衰减电路包括串联耦合在节点和开关节点之间的电容器，并且被配置为基于第一控制信号的断言对电容器充电并将开关节点与地断开，并且将开关节点放电到 基于第二控制信号的断言接地。
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