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    RESISTIVE MEMORY DEVICES HAVING A STACKED STRUCTURE AND METHODS OF OPERATION THEREOF
    22.
    发明申请
    RESISTIVE MEMORY DEVICES HAVING A STACKED STRUCTURE AND METHODS OF OPERATION THEREOF 有权
    具有堆叠结构的电阻式存储器件及其操作方法

    公开(公告)号：US20100226165A1

    公开(公告)日：2010-09-09

    申请号：US12714950

    申请日：2010-03-01

    申请人： Sang Beom Kang ,  Chul Woo Park ,  Hyun Ho Choi ,  Ho Jung Kim

    发明人： Sang Beom Kang ,  Chul Woo Park ,  Hyun Ho Choi ,  Ho Jung Kim

    IPC分类号： G11C11/00 ,  G11C8/08 ,  G11C7/00

    CPC分类号： G11C7/1045 ,  G11C5/02 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2211/5641 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/79

    摘要： A memory device includes a stacked resistive memory cell array comprising a plurality of resistive memory cell layers stacked on a semiconductor substrate, wherein respective memory cell layers are configured to store data according to respective program modes comprising a number of bits per cell. The memory device further includes a control circuit configured to identify a program mode of a selected memory cell layer responsive to an address signal and to access the selected memory cell layer responsive to the address signal according to the identified program mode. The program modes may include a single-level cell mode and at least one multi-level cell mode.

    摘要翻译： 存储器件包括堆叠在半导体衬底上的多个电阻存储器单元层的堆叠电阻性存储单元阵列，其中相应的存储单元层被配置为根据包括每个单元的位数的各自的程序模式来存储数据。 该存储装置还包括控制电路，该控制电路被配置为响应于地址信号来识别所选择的存储器单元层的编程模式，并且根据所识别的程序模式响应于地址信号访问所选择的存储单元层。 程序模式可以包括单级单元模式和至少一个多级单元模式。

    Magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices
    23.
    发明申请
    Magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices 失效
    磁性分组存储器存储设备，包括这种设备的存储器系统以及控制这些设备的方法

    公开(公告)号：US20100208381A1

    公开(公告)日：2010-08-19

    申请号：US12658807

    申请日：2010-02-16

    申请人： Ho-jung Kim ,  Chul-woo Park ,  Sang-beom Kang ,  Jong-wan Kim ,  Hyun-ho Choi ,  Young-pil Kim ,  Sung-chul Lee

    发明人： Ho-jung Kim ,  Chul-woo Park ,  Sang-beom Kang ,  Jong-wan Kim ,  Hyun-ho Choi ,  Young-pil Kim ,  Sung-chul Lee

    IPC分类号： G11B19/02

    CPC分类号： G11C11/15 ,  G11C5/04

    摘要： A memory device is comprised of a magnetic structure that stores information in a plurality of domains of the magnetic structure. A write unit writes information to at least one of the plurality of domains of the magnetic structure by applying a write current to the magnetic structure in response to a control signal. A read unit reads information from at least one of the plurality of domains of the magnetic structure by applying a read current to the magnetic structure in response to the control signal. A domain wall movement control unit is coupled to a portion of the magnetic structure and moves information stored in the plurality of domains in the magnetic structure to other domains in the magnetic structure in response to the control signal. The write unit, the read unit and the domain wall movement control unit are all coupled to the same control signal line that provides the control signal.

    摘要翻译： 存储器件由将磁信息存储在磁结构的多个域中的磁结构构成。 写单元响应于控制信号向磁结构施加写入电流，将信息写入磁结构的多个域中的至少一个。 读取单元通过响应于控制信号向磁性结构施加读取电流，从磁性结构的多个域中的至少一个域读取信息。 畴壁移动控制单元耦合到磁结构的一部分，并且响应于控制信号将存储在磁结构中的多个域中的信息移动到磁结构中的其他区域。 写单元，读单元和域壁移动控制单元都耦合到提供控制信号的相同控制信号线。

    Semiconductor memory devices with mismatch cells
    24.
    发明申请
    Semiconductor memory devices with mismatch cells 有权
    具有不匹配单元的半导体存储器件

    公开(公告)号：US20100118631A1

    公开(公告)日：2010-05-13

    申请号：US12591196

    申请日：2009-11-12

    申请人： Jin-Young Kim ,  Chul-Woo Park ,  Ki-Whan Song

    发明人： Jin-Young Kim ,  Chul-Woo Park ,  Ki-Whan Song

    IPC分类号： G11C7/00 ,  G11C7/06

    CPC分类号： G11C11/4099 ,  G11C11/4091

    摘要： A semiconductor memory device having the mismatch cell makes a capacitance difference between a bit line pair relatively large during a read operation using at least one dummy memory cell as a mismatch cell selected together with a corresponding memory cell. Therefore, data of a semiconductor memory device may be detected more easily.

    摘要翻译： 具有不匹配单元的半导体存储器件在使用至少一个虚拟存储器单元作为与对应的存储器单元一起选择的不匹配单元的读取操作期间，位线对之间的电容差相对较大。 因此，可以更容易地检测半导体存储器件的数据。

    Liquid crystal display device
    25.
    发明授权
    Liquid crystal display device 失效
    液晶显示装置

    公开(公告)号：US07679589B2

    公开(公告)日：2010-03-16

    申请号：US11326692

    申请日：2006-01-06

    申请人： Chul-Woo Park

    发明人： Chul-Woo Park

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3696 ,  G09G3/3648 ,  G09G3/3685 ,  G09G2300/0491 ,  G09G2310/027 ,  G09G2320/0252

    摘要： The present invention relates to a liquid crystal display device with a source driver in which a significant signal delay is not generated, and which has a fast response speed. The present invention also provides a liquid crystal display device comprising a scan driver including a D/A converter for outputting analog signals corresponding to gradation data input, a triangular wave generator for outputting triangular wave signals, and a comparator for applying data voltage to each pixel which include OCB liquid crystal cells by comparing the analog signals with the triangular wave signals. The data voltage is a PWM pulse with a varied voltage width.

    摘要翻译： 本发明涉及一种具有源极驱动器的液晶显示装置，其中不产生显着的信号延迟，并具有快速的响应速度。 本发明还提供一种液晶显示装置，包括：扫描驱动器，包括用于输出对应于灰度数据输入的模拟信号的D / A转换器，用于输出三角波信号的三角波发生器;以及用于向每个像素施加数据电压的比较器 其通过将模拟信号与三角波信号进行比较来包括OCB液晶单元。 数据电压是具有不同电压宽度的PWM脉冲。

    Liquid crystal display apparatus
    26.
    发明申请
    Liquid crystal display apparatus 有权
    液晶显示装置

    公开(公告)号：US20090273728A1

    公开(公告)日：2009-11-05

    申请号：US12385972

    申请日：2009-04-24

    申请人： Young-Woo Song ,  Jong-Hyuk Lee ,  Kyu-Hwan Hwang ,  Jong-Seok Oh ,  Joon-Gu Lee ,  Jae-Heung Ha ,  Chul-Woo Park

    发明人： Young-Woo Song ,  Jong-Hyuk Lee ,  Kyu-Hwan Hwang ,  Jong-Seok Oh ,  Joon-Gu Lee ,  Jae-Heung Ha ,  Chul-Woo Park

    IPC分类号： G02F1/1335

    CPC分类号： G02F1/133536 ,  G02B5/3058 ,  G02F2001/133548 ,  G02F2201/08 ,  G02F2201/38

    摘要： A liquid crystal display apparatus includes a backlight unit, a second polarization layer, a liquid crystal layer disposed between the backlight unit and the second polarization layer, a first polarization layer disposed between the backlight unit and the liquid crystal layer. In an embodiment, a surface of the first polarization layer facing the backlight unit includes a reflective surface and a surface of the first polarization layer facing the backlight unit includes an absorbent surface. In another embodiment, the first polarization layer includes grids, which include a metal, and absorbing members, which include dielectric materials. In another embodiment, the first polarization layer includes grids, each of which includes a first component including a dielectric material and a second component including a metal.

    摘要翻译： 液晶显示装置包括背光单元，第二偏振层，设置在背光单元和第二偏振层之间的液晶层，设置在背光单元和液晶层之间的第一偏振层。 在一个实施例中，面向背光单元的第一偏振层的表面包括反射表面，并且面向背光单元的第一偏振层的表面包括吸收表面。 在另一个实施例中，第一偏振层包括包括金属的网格和包括电介质材料的吸收构件。 在另一个实施例中，第一偏振层包括格栅，每个栅格包括包括电介质材料的第一元件和包括金属的第二元件。

    PRINT HEAD INCLUDING AN ORGANIC LIGHT EMITTING DEVICE
    28.
    发明申请
    PRINT HEAD INCLUDING AN ORGANIC LIGHT EMITTING DEVICE 审中-公开
    打印头包括有机发光装置

    公开(公告)号：US20080165243A1

    公开(公告)日：2008-07-10

    申请号：US11854459

    申请日：2007-09-12

    申请人： Jong-Seok Oh ,  Jong-hyuk Lee ,  Young-Woo Song ,  Kyu-Hwan Hwang ,  Joon-Gu Lee ,  Jae-Heung Ha ,  Chul-Woo Park

    发明人： Jong-Seok Oh ,  Jong-hyuk Lee ,  Young-Woo Song ,  Kyu-Hwan Hwang ,  Joon-Gu Lee ,  Jae-Heung Ha ,  Chul-Woo Park

    IPC分类号： B41J2/45 ,  H01J1/62

    CPC分类号： B41J2/45 ,  H01L51/5203

    摘要： A print head includes a light source, a driver chip electrically connected to the light source and a lens array on the side of light irradiation of the light source. The light source includes a substrate and a plurality of organic light emitting diodes arranged in adjacent groups on the substrate. Each of the organic light emitting diodes of a group includes a first electrode, an organic emissive layer, and a second electrode. First wires on the substrate connect each first electrode to a first electrode in an adjacent group. A separator is located between the adjacent groups. A first pad on the substrate is electrically connected to each first electrode of each of the organic light emitting diodes of a first group and a plurality of second pads are located on the substrate, each second pad electrically connected to the second electrode of each group.

    摘要翻译： 打印头包括光源，电连接到光源的驱动器芯片和在光源的光照射侧的透镜阵列。 光源包括基板和布置在基板上的相邻组中的多个有机发光二极管。 组中的每个有机发光二极管包括第一电极，有机发光层和第二电极。 基板上的第一导线将每个第一电极连接到相邻组中的第一电极。 分隔物位于相邻组之间。 衬底上的第一焊盘电连接到第一组的每个有机发光二极管的每个第一电极，并且多个第二焊盘位于衬底上，每个第二焊盘电连接到每个组的第二电极。

    Multiple cover memory card
    29.
    发明授权
    Multiple cover memory card 有权
    多盖存储卡

    公开(公告)号：US07359204B1

    公开(公告)日：2008-04-15

    申请号：US11355092

    申请日：2006-02-15

    申请人： Sang Jae Jang ,  Chul Woo Park ,  Jong Woon Choi ,  Jae Dong Kim ,  Choon Heung Lee ,  Chang Deok Lee

    发明人： Sang Jae Jang ,  Chul Woo Park ,  Jong Woon Choi ,  Jae Dong Kim ,  Choon Heung Lee ,  Chang Deok Lee

    IPC分类号： H05K7/20

    CPC分类号： H05K5/0256 ,  G06K19/07 ,  G06K19/07732

    摘要： A memory card including a module comprising at least a printed circuit board having an electronic circuit device mounted thereto and at least one I/O pad and at least one test pad disposed thereon. The module is inserted into a complementary cavity formed within a case of the memory card, such case generally defining the outer appearance of the memory card. The module is secured within the cavity of the case through the use of an adhesive. In each embodiment of the present invention, first and second covers are movably attached to a case for selectively covering or exposing the I/O pads and the test features/pads of the module of the memory card.

    摘要翻译： 一种存储卡，包括至少包括安装有电子电路装置的印刷电路板和至少一个I / O焊盘和至少一个设置在其上的测试焊盘的模块。 模块被插入形成在存储卡的壳体内的互补空腔中，这种情况通常限定存储卡的外观。 模块通过使用粘合剂固定在外壳的腔内。 在本发明的每个实施例中，第一和第二盖可移动地附接到壳体，用于选择性地覆盖或暴露存储卡模块的I / O焊盘和测试特征/焊盘。

    Semiconductor memory devices and signal line arrangements and related methods
    30.
    发明授权
    Semiconductor memory devices and signal line arrangements and related methods 失效
    半导体存储器件和信号线布置及相关方法

    公开(公告)号：US07259978B2

    公开(公告)日：2007-08-21

    申请号：US11221684

    申请日：2005-09-08

    申请人： Chul-Woo Park ,  Jung-Bae Lee ,  Young-Sun Min ,  Jong-Hyun Choi ,  Jong-Eon Lee

    发明人： Chul-Woo Park ,  Jung-Bae Lee ,  Young-Sun Min ,  Jong-Hyun Choi ,  Jong-Eon Lee

    IPC分类号： G11C5/06

    CPC分类号： G11C5/063 ,  G11C7/18 ,  G11C8/14

    摘要： A semiconductor memory device may include a memory cell array, a bit line sense amplifier, a sub word line driver, and an electrode. The memory cell array may include a sub memory cell array connected between sub word lines and bit line pairs and having memory cells which are selected in response to a signal transmitted to the sub word lines and column selecting signal lines. The bit line sense amplifier may be configures to sense and amplify data of the bit line pairs. The sub word line driver may be configured to combine signals transmitted from word selecting signal lines and signals transmitted from main word lines to select the sub word lines. Moreover, the memory cell array may be configured to transmit data between the bit line pairs and local data line pairs and to transmit data between the local data line pairs and global data line pairs. The electrode may be configured to cover the whole memory cell array and to apply a voltage needed for the memory cells. The local data line pairs may be arranged on a first layer above the electrode in the same direction as the sub word line. The column selecting signal lines and the global data line pairs may be arranged on a second layer above the electrode in the same direction as the bit line. The word selecting signal lines and the main word lines may be arranged on a third layer above the electrode in the same direction as the sub word line. Related methods of signal line arrangement are also discussed.

    摘要翻译： 半导体存储器件可以包括存储单元阵列，位线读出放大器，子字线驱动器和电极。 存储单元阵列可以包括连接在子字线和位线对之间并具有响应于发送到子字线和列选择信号线的信号而被选择的存储器单元的子存储单元阵列。 位线读出放大器可以被配置为感测和放大位线对的数据。 子字线驱动器可以被配置为组合从字选择信号线发送的信号和从主字线发送的信号，以选择子字线。 此外，存储单元阵列可以被配置为在位线对和本地数据线对之间传输数据，并且在本地数据线对和全局数据线对之间传送数据。 电极可以被配置为覆盖整个存储单元阵列并施加存储单元所需的电压。 局部数据线对可以以与子字线相同的方向布置在电极上方的第一层上。 列选择信号线和全局数据线对可以以与位线相同的方向布置在电极上方的第二层上。 字选择信号线和主字线可以沿与子字线相同的方向布置在电极上方的第三层上。 还讨论了信号线布置的相关方法。