公开(公告)号：US5412237A

公开(公告)日：1995-05-02

申请号：US26359

申请日：1993-03-04

申请人： Shigeki Komori ,  Katsuhiro Tsukamoto

发明人： Shigeki Komori ,  Katsuhiro Tsukamoto

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/285 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/41 ,  G11C11/34 ,  H01G4/06 ,  H01L29/76

CPC分类号： H01L27/10852 ,  H01L21/28525 ,  H01L28/40

摘要： A lower electrode of a capacitor for use in a semiconductor device includes a first semiconductor layer having a predetermined impurity concentration and a second semiconductor layer having an impurity concentration higher than that of the first semiconductor layer. As a result, intensification of an electric field at an end portion of the capacitor can be reduced. In addition, a word line is formed of a buffer layer and a main conductor layer to reduce a parasitic capacitance between the lower electrode of the capacitor and the word line.

摘要翻译： 用于半导体器件的电容器的下电极包括具有预定杂质浓度的第一半导体层和杂质浓度高于第一半导体层的第二半导体层。 结果，能够减小电容器端部的电场的强化。 此外，字线由缓冲层和主导体层形成，以减小电容器的下电极和字线之间的寄生电容。

公开(公告)号：US5028560A

公开(公告)日：1991-07-02

申请号：US317710

申请日：1989-03-01

申请人： Katsuhiro Tsukamoto ,  Akira Tokui

发明人： Katsuhiro Tsukamoto ,  Akira Tokui

IPC分类号： H01L21/20 ,  H01L21/306 ,  H01L21/316 ,  H01L21/318

CPC分类号： H01L21/02043 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02301 ,  H01L21/0231 ,  H01L21/02312 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/3185 ,  Y10S148/017 ,  Y10S438/909 ,  Y10S438/974

摘要： A method and apparatus for manufacturing a semiconductor device having a thin layer of material formed on a semiconductor substrate with a much improved interface between them are disclosed. A silicon substrate is heated up to a temperature around 300.degree. C. in the presence of ozone gas under exposure to UV light. Through this process, organic contaminants that might be present on the surface of the silicon substrate are dissipated by oxidation, and a thin oxide film is formed on the substrate surface on the other. The silicon substrate with the thin oxide film coated thereon is then heated up to temperature of 200.degree.-700.degree. C. in the presence of HCl gas under illumination to UV light to strip the oxide film off the substrate surface, thereby exposing the cleaned substrate surface. Finally, HCl cleaned surface of the silicon substrate is coated with a thin layer of material such as monocrystalline silicon without exposing the cleaned substrate surface. The method provides a semiconductor device with the thin layer of material formed thereon having a well-controlled, well-organized interface between them.

摘要翻译： 公开了一种用于制造半导体器件的方法和装置，该半导体器件具有形成在半导体衬底上的薄层材料，其间具有大大改善的界面。 在暴露于紫外光的情况下，在臭氧气体存在下将硅衬底加热至约300℃的温度。 通过这种方法，可能存在于硅衬底表面上的有机污染物通过氧化而消散，另一方面在衬底表面上形成薄氧化膜。 然后在其上涂覆有薄氧化物膜的硅衬底在HCl气体存在下在200℃〜700℃的温度下照射到UV光以将氧化膜从衬底表面剥离，从而暴露清洁的衬底 表面。 最后，硅衬底的HCl清洗表面涂覆有诸如单晶硅的薄层材料，而不暴露清洁的衬底表面。 该方法提供了半导体器件，其上形成有薄层材料，其间具有良好控制的，良好组织的界面。

公开(公告)号：US5019520A

公开(公告)日：1991-05-28

申请号：US516643

申请日：1990-04-30

申请人： Shigeki Komori ,  Shigeru Kusunoki ,  Katsuhiro Tsukamoto

发明人： Shigeki Komori ,  Shigeru Kusunoki ,  Katsuhiro Tsukamoto

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/10

CPC分类号： H01L29/6659 ,  H01L29/105 ,  H01L29/1083 ,  Y10S438/965

摘要： A method for preparing a MISFET of a minute size with the channel length of not more than 2 .mu.m between a source and a drain, comprises the steps of forming a mask for exposing a region for forming a well on a planar surface of a semiconductor substrate, and introducing ions at a predetermined energy into the well region by using the mask. The predetermined energy is such as to form a peak of the impurity concentration distribution at a position deeper than the bottom surface of the source and the drain and to maintain the layer of at least a partial layer of the channel at an impurity concentration lower than 10.sup.16 cm.sup.-3 so that a high speed carrier movement in the channel is provided without causing a punch-through phenomenon.

摘要翻译： 在源极和漏极之间制备沟道长度不大于2μm的微小尺寸的MISFET的方法包括以下步骤：形成掩模，用于在半导体的平面表面上暴露用于形成阱的区域 通过使用掩模将预定能量的离子引入阱区。 预定的能量是在比源极和漏极的底面更深的位置处形成杂质浓度分布的峰值，并且保持沟道的至少部分层的层的杂质浓度低于1016 cm-3，从而提供通道中的高速载体运动而不会产生穿孔现象。

公开(公告)号：US4942448A

公开(公告)日：1990-07-17

申请号：US262303

申请日：1988-10-25

申请人： Katsuhiro Tsukamoto ,  Masahide Inuishi ,  Masahiro Shimizu

发明人： Katsuhiro Tsukamoto ,  Masahide Inuishi ,  Masahiro Shimizu

IPC分类号： H01L21/76 ,  H01L21/763 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78

CPC分类号： H01L21/76 ,  H01L21/763

摘要： A semiconductor apparatus having a region for isolation between devices comprises a semiconductor substrate, a polycrystalline silicon layer portions selectively formed to be spaced apart from each other on the semiconductor substrate, an impurity diffused region formed under the polycrystalline silicon layer, and a silicon oxide film for filling in a space between the respective adjacent portions of the polycrystalline silicon layer. The impurity diffused region constitutes a source or drain region of a field effect device such as a MOS transistor isolated by the silicon oxide film.

摘要翻译： 具有用于在器件之间隔离的区域的半导体器件包括半导体衬底，选择性地形成为在半导体衬底上彼此间隔开的多晶硅层部分，形成在多晶硅层下面的杂质扩散区域和氧化硅膜 用于填充多晶硅层的各个相邻部分之间的空间。 杂质扩散区域构成诸如通过氧化硅膜隔离的MOS晶体管的场效应器件的源极或漏极区域。

公开(公告)号：US4931897A

公开(公告)日：1990-06-05

申请号：US390012

申请日：1989-08-07

申请人： Katsuhiro Tsukamoto ,  Masahiro Shimizu ,  Hiroshi Miyatake

发明人： Katsuhiro Tsukamoto ,  Masahiro Shimizu ,  Hiroshi Miyatake

IPC分类号： H01L21/02

CPC分类号： H01L28/40 ,  Y10T29/435

摘要： A method of manufacturing a semiconductor capacitor provided with a substrate, a dielectric film formed on the substrate and a pair of electrode layers stacked on both sides of the dielectric film comprises a step of forming a polycrystalline silicon layer for serving as one of the electrode layers on the substrate, a step of making at least a surface region of the polycrystalline silicon layer amorphous, a step of forming the dielectric film on the polycrystalline silicon layer while maintaining an amorphous surface state, and a step of forming another one of the electrode layers on the dielectric film. The lower electrode of the capacitor has its surface or the whole layer made amorphous. The surface of the electrode which is amorphous has smooth surface configuration, thereby improving the quality of the dielectric film formed thereon.

摘要翻译： 一种制造具有基板的半导体电容器的制造方法，在该基板上形成的电介质膜和层叠在该电介质膜的两面的一对电极层，具有形成用作电极层之一的多晶硅层的工序 在所述基板上形成至少使所述多晶硅层的表面区域为非晶体的步骤，在保持非晶质表面状态的同时在所述多晶硅层上形成所述电介质膜的工序，以及形成所述电极层的另一个的工序 在电介质膜上。 电容器的下电极具有其表面或整个层是无定形的。 无定形的电极的表面具有光滑的表面形状，从而提高其上形成的电介质膜的质量。

公开(公告)号：US5478761A

公开(公告)日：1995-12-26

申请号：US86449

申请日：1993-07-06

申请人： Shigeki Komori ,  Katsuhiro Tsukamoto

发明人： Shigeki Komori ,  Katsuhiro Tsukamoto

IPC分类号： H01L27/092 ,  H01L21/265

CPC分类号： H01L27/0928 ,  Y10S257/929

摘要： A complementary field effect element develops an intensified latch-up preventive property even if the distance between the emitters of parasitic transistors is short, and a method of producing the same are disclosed. The complementary field effect element includes a high concentration impurity layer (16) formed by ion implantation in the boundary region between a P-well (2) and an N-well (3) which are formed adjacent each other on the main surface of a semiconductor substrate (1). Therefore, carriers passing through the boundary region between the P-well (2) and the N-well (3) are decreased, so that even if the distance between the emitters (4, 5) of parasitic transistors is short, there is obtained an intensified latch-up preventive property.

摘要翻译： 即使寄生晶体管的发射极之间的距离短，互补的场效应元件也产生增强的防闩锁特性，并且公开了其制造方法。 互补场效应元件包括在P阱（2）和N阱（3）之间的边界区域中通过离子注入形成的高浓度杂质层（16），它们彼此相邻地形成在 半导体衬底（1）。 因此，穿过P阱（2）和N阱（3）之间的边界区域的载流子减少，使得即使寄生晶体管的发射极（4,5）之间的距离较短，也可获得 增强了防闩锁性能。

公开(公告)号：US5427972A

公开(公告)日：1995-06-27

申请号：US511818

申请日：1990-04-18

申请人： Masahiro Shimizu ,  Katsuhiro Tsukamoto

发明人： Masahiro Shimizu ,  Katsuhiro Tsukamoto

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/768 ,  H01L23/485 ,  H01L27/108 ,  H01L29/78 ,  H01L21/8229

CPC分类号： H01L27/10829 ,  H01L21/7684 ,  H01L23/485 ,  H01L2924/0002

摘要： A semiconductor device comprises a P-type semiconductor substrate having a major surface, an insulating film formed on the major surface of the semiconductor substrate, a first polycrystalline silicon layer formed on the insulating film, an n.sup.+ diffused layer formed on the substrate and adjacent to an end portion of the first polycrystalline silicon layer, and a side wall formed on the end portion of the first polycrystalline silicon layer and formed of a second polycrystalline silicon layer for connecting the end portion of the first polycrystalline silicon layer with the n.sup.+ diffused layer.

摘要翻译： 半导体器件包括具有主表面的P型半导体衬底，形成在半导体衬底的主表面上的绝缘膜，形成在绝缘膜上的第一多晶硅层，形成在衬底上并与衬底相邻的n +扩散层 所述第一多晶硅层的端部和形成在所述第一多晶硅层的端部上并由用于将所述第一多晶硅层的端部与所述n +扩散层连接的第二多晶硅层形成的侧壁。

公开(公告)号：US5407867A

公开(公告)日：1995-04-18

申请号：US948528

申请日：1992-09-22

申请人： Masanobu Iwasaki ,  Hiromi Itoh ,  Akira Tokui ,  Katsuyoshi Mitsui ,  Katsuhiro Tsukamoto

发明人： Masanobu Iwasaki ,  Hiromi Itoh ,  Akira Tokui ,  Katsuyoshi Mitsui ,  Katsuhiro Tsukamoto

IPC分类号： C23C14/02 ,  C23C14/56 ,  C23C16/02 ,  C23C16/54 ,  H01L21/465

CPC分类号： C23C14/568 ,  C23C14/022 ,  C23C16/0236 ,  C23C16/54 ,  Y10S438/913

摘要： A method of and an apparatus for removing a naturally grown oxide film and contaminants on the surface of a semiconductor substrate and then forming a thin film on the cleaned surface. The semiconductor substrate is placed in a pretreatment chamber and then hydrogen chloride gas is introduced into the chamber. Then, the semiconductor substrate is heated at a temperature between 200.degree..about.700.degree. C. and the surface of the semiconductor substrate is irradiated with ultraviolet rays, whereby the naturally grown oxide film and other contaminants on the semiconductor substrate can be removed. Then, a thin film is formed on the cleaned surface of the semiconductor substrate by a CVD method or a sputter method. According to this method, the naturally oxide film and other contaminants can be removed from the surface of the semiconductor substrate at a low temperature and the thin film can be formed on the cleaned surface. As a result, an interface structure between the semiconductor substrate and the thin film can be controlled to be in a preferable state.

摘要翻译： 一种用于去除半导体衬底表面上的天然生长的氧化物膜和污染物，然后在清洁表面上形成薄膜的方法和设备。 将半导体基板放置在预处理室中，然后将氯化氢气体引入室中。 然后，在200℃〜700℃的温度下加热半导体衬底，用紫外线照射半导体衬底的表面，由此可以除去半导体衬底上的天然生长的氧化膜和其它污染物。 然后，通过CVD法或溅射法在半导体衬底的清洁表面上形成薄膜。 根据该方法，可以在低温下从半导体基板的表面去除天然氧化膜和其它污染物，并且可以在清洁的表面上形成薄膜。 结果，可以将半导体衬底和薄膜之间的界面结构控制在优选的状态。

公开(公告)号：US5293060A

公开(公告)日：1994-03-08

申请号：US906890

申请日：1992-07-06

申请人： Shigeki Komori ,  Katsuhiro Tsukamoto

发明人： Shigeki Komori ,  Katsuhiro Tsukamoto

IPC分类号： H01L21/761 ,  H01L21/74 ,  H01L21/76 ,  H01L21/8238 ,  H01L21/8242 ,  H01L27/092 ,  H01L27/10 ,  H01L27/108 ,  H01L27/02

CPC分类号： H01L21/74 ,  H01L27/0921 ,  H01L27/0928 ,  H01L27/10808

摘要： A semiconductor device has an upper well of a first conductivity type formed from the surface of an active region separated by an isolation oxide film at the surface of a semiconductor substrate to a predetermined depth. A first conductivity type layer of high concentration is formed along the entire region of an active region to enclose the bottom of the upper well of the first conductivity type. A lower well of the first conductivity type of a predetermined thickness is formed as a buried layer to enclose the bottom of the first conductivity type layer of high concentration. According to this structure, the spreadout of impurities into the active region due to diffusion at the time of thermal treatment is suppressed. The semiconductor device has the wells and the buried layer of high concentration formed by implanting impurities after the step of forming the isolation oxide film, so that diffusion of impurities into the active region due to thermal treatment at the time of isolation oxide film formation is suppressed. As a result, degradation of channel effect is prevented in miniaturization of the semiconductor device.

摘要翻译： 半导体器件具有由半导体衬底的表面上的隔离氧化膜分隔成预定深度的由有源区的表面形成的第一导电类型的上阱。 沿着有源区域的整个区域形成高浓度的第一导电型层，以包围第一导电类型的上阱的底部。 形成预定厚度的第一导电类型的下阱作为掩埋层以包围高浓度的第一导电类型层的底部。 根据该结构，能够抑制由于热处理时的扩散而使杂质向活性区域的扩散。 半导体器件具有在形成隔离氧化膜的步骤之后通过注入杂质形成的阱和高浓度的掩埋层，从而抑制了隔离氧化膜形成时由于热处理而导致的杂质扩散到有源区中 。 结果，半导体器件的小型化防止沟道效应的劣化。

公开(公告)号：US5258321A

公开(公告)日：1993-11-02

申请号：US896872

申请日：1992-06-10

申请人： Masahiro Shimizu ,  Katsuhiro Tsukamoto ,  Masahide Inuishi

发明人： Masahiro Shimizu ,  Katsuhiro Tsukamoto ,  Masahide Inuishi

IPC分类号： H01L21/8242 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10861 ,  H01L27/10829

摘要： A semiconductor memory device having memory cells formed adjacent to each other comprises a P type semiconductor substrate having adjacent two trenches, a P.sup.+ impurity region formed in the side portions and the bottom portions of the trenches, n type first polysilicon layers serving as common electrodes formed in the upper portion of the P.sup.+ impurity region through an insulating film, second polysilicon layers formed inside and in the upper portion of the trenches formed of the first polysilicon layers through an insulating film, and a third polysilicon layer formed on the second polysilicon layers, only the third polysilicon layer constituting a connecting electrode between the adjacent memory cells.

摘要翻译： 具有彼此相邻形成的存储单元的半导体存储器件包括具有相邻的两个沟槽的P型半导体衬底，形成在沟槽的侧部和底部中的P +杂质区，形成用作共同电极的n型第一多晶硅层 通过绝缘膜在P +杂质区的上部，通过绝缘膜形成在由第一多晶硅层形成的沟槽的内部和上部的第二多晶硅层，以及形成在第二多晶硅层上的第三多晶硅层， 只有第三多晶硅层构成相邻存储单元之间的连接电极。