Abstract:
A leadless plastic chip carrier is constructed by half etching one or both sides of the package design onto a leadframe strip so as to create unique design features such as power and/or ground ring surrounding the die attach pad, interlocking rivet head construction for the contact pads, and an interlocking pattern for the die attach pad. After wire bonding and molding, a further etching is performed to isolate and expose contact pads. Singulation of individual chip packages from the leadframe strip is then performed by saw singulation or die punching.
Abstract:
A fiber-cement trim board is formed by a fiber-cement core layer faced with a pair of fiber-cement surface layers of substantially equal thickness in the core layer and have a cement-to-wood ratio by weight of between 2 and 3.5 and at least 70% of the wood strands have a length longer than 10 min. Each of the surface layers is formed of a fiber-cement mixture containing wood strands, at least 80% of which have a length of less than 4 mm and a cement-to-wood ratio by weight of between 2 and 3.5. The board is covered at least on the two main faces by a water barrier coating.
Abstract:
A process for fabricating an integrated circuit package includes selectively etching a leadframe strip to define a die attach pad and a plurality of contact pads. At least one side of the die attach pad has a plurality of spaced apart pad portions. A semiconductor die is mounted to the die attach pad and wires are bonded from the semiconductor die to respective ones of the contact pads. A first surface of the leadframe strip, including the semiconductor die and wire bonds, is encapsulated in a molding material such that at least one surface of the leadframe strip is exposed. The integrated circuit package is singulated from a remainder of the leadframe strip.
Abstract:
The embodiments herein describe a dynamic metal-oxide-semiconductor field-effect transistor (MOSFET) gate driver system architecture and control scheme. The MOSFET gate driver system dynamically adjusts both the gate driver turn-on-resistance and the gate driver turn-off resistance within a single (i.e., one) switching cycle to reduce electromagnetic interference (EMI) in the system and to minimize the conduction loss of a power MOSFET during operation.
Abstract:
A power converter that controls a collector current of a bipolar junction transistor (BJT) by controlling the base current to the BJT after having determined the gain of the BJT. A gain detection block determines a gain of the BJT during a first mode. A current calculation block generates a current setting for the base current based on the gain of the BJT determined by the gain detection block during a second mode distinct from the first mode. In some embodiments, the power converter may be included in a LED lamp system.
Abstract:
A system tool that provides dispatchers in power grid control centers with a capability to manage changes. Included is a user interface and a plurality of scheduler engines. Each scheduler engine is configured to look ahead at different time frames to forecast system conditions and alter generation patterns within the different time frames. A comprehensive operating plan holds schedules generated by the plurality of scheduler engines. A relational database is coupled to the comprehensive operating plan. Input data is initially received from the relational database for each scheduling engine, and thereafter the relational database receives data from the scheduling engines relative to forecast system conditions.
Abstract:
A switching power converter comprises a transformer (110), a switch (108) coupled to the transformer (110), and a switch controller (200) coupled to the switch (108) for generating a switch drive signal (207) to turn on or off the switch (108). The drive current of the switch drive signal (207) is adjusted dynamically according to line or load conditions within a switching cycle and/or over a plurality of switching cycles. The magnitude of the drive current can be dynamically adjusted within a switching cycle and/or over a plurality of switching cycles, in addition to the pulse widths or pulse frequencies of the drive current.
Abstract:
The embodiments disclosed herein describe the dynamic control of a switching power converter between different operation modes of the switching power converter. In one embodiment, the operation modes of the switching power converter include a switching mode and a linear mode. The switching power converter may be included in a LED lamp system according to one embodiment.
Abstract:
A method of manufacturing a printed circuit board is disclosed. A conductive metal layer is formed on a first surface of a dielectric substrate. One or more vias are formed through the substrate. A conductive metal layer is formed on the first surface of the substrate and is patterned to form conductive traces on the first surface of the substrate. A plating mask is formed on the second surface of the substrate. One or more openings are formed in the plating mask to correspond to the location of the via(s). Conductive metal is deposited in the via(s) sufficient to substantially fill the via(s) and make contact with the conductive metal layer on the first surface and substantially to the level of the plating mask. The plating mask is removed from the substrate such that one or more conductive posts extend outwardly from the second surface of the substrate.
Abstract:
A method is provided for merging different load forecasts for power grid centers. Area load forecasts are accepted from load forecast engines. A relational database saves load forecast engine data. A comprehensive operating plan integrates individual load forecasts into a composite load forecast to present a comprehensive, synchronized and harmonized load forecast.