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    Interfacing multiple wavelength sources to thin optical waveguides utilizing evanescent coupling
    21.
    发明申请
    Interfacing multiple wavelength sources to thin optical waveguides utilizing evanescent coupling 有权
    使用ev逝耦合将多个波长源连接到薄光波导上

    公开(公告)号：US20050094939A1

    公开(公告)日：2005-05-05

    申请号：US10935146

    申请日：2004-09-07

    Applicant: Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine Yanushefski

    Inventor： Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  Kalpendu Shastri ,  Katherine Yanushefski

    IPC: G02B20060101 ,  G02B6/34

    CPC classification number: G02B6/12007 ,  G02B6/124 ,  G02B6/34

    Abstract: An arrangement for achieving and maintaining high efficiency coupling of light between a multi-wavelength optical signal and a relatively thin (e.g., sub-micron) silicon optical waveguide uses a prism coupler in association with an evanescent coupling layer. A grating structure having a period less than the wavelengths of transmission is formed in the coupling region (either formed in the silicon waveguide, evanescent coupling layer, prism coupler, or any combination thereof) so as to increase the effective refractive index “seen” by the multi-wavelength optical signal in the area where the beam exiting/entering the prism coupler intercepts the waveguide surface (referred to as the “prism coupling surface”). The period and/or duty cycle of the grating can be controlled to modify the effective refractive index profile in the direction away from the coupling region so as to reduce the effective refractive index from the relatively high value useful in multi-wavelength coupling to the lower value associated with maintaining confinement of the optical signals within the surface waveguide structure, thus reducing reflections along the transition region.

    Abstract translation: 用于实现和维持多波长光信号和较薄（例如亚微米）硅光波导之间的高效率耦合的布置使用与渐逝耦合层相关联的棱镜耦合器。 在耦合区域（形成在硅波导，ev逝耦合层，棱镜耦合器或其任何组合中）形成具有小于透射波长的周期的光栅结构，以便通过“看到”来提高有效折射率 离开/进入棱镜耦合器的光束截取波导表面（称为“棱镜耦合表面”）的区域中的多波长光信号。 可以控制光栅的周期和/或占空比以在远离耦合区域的方向上改变有效折射率分布，以便将有效折射率从在多波长耦合中的有用折射率降低到较低的值 与保持表面波导结构内的光信号的限制相关联的值，从而减少沿着过渡区域的反射。

    Self-Aligning Connectorized Fiber Array Assembly
    24.
    发明申请
    Self-Aligning Connectorized Fiber Array Assembly 有权
    自对准连接光纤阵列组件

    公开(公告)号：US20130183008A1

    公开(公告)日：2013-07-18

    申请号：US13737080

    申请日：2013-01-09

    Applicant: Kalpendu Shastri ,  Soham Pathak ,  Utpal Chakrabarti ,  Vipulkumar Patel ,  Bipin Dama ,  Ravinder Kachru ,  Kishor Desai

    Inventor： Kalpendu Shastri ,  Soham Pathak ,  Utpal Chakrabarti ,  Vipulkumar Patel ,  Bipin Dama ,  Ravinder Kachru ,  Kishor Desai

    IPC: G02B6/42

    CPC classification number: G02B6/4292 ,  B82Y20/00 ,  C03C15/00 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4246 ,  G02B6/4259 ,  Y10T29/4978

    Abstract: An apparatus for providing self-aligned optical coupling between an opto-electronic substrate and a fiber array, where the substrate is enclosed by a transparent lid such that the associated optical signals enter and exit the arrangement through the transparent lid. The apparatus takes the form of a two-part connectorized fiber array assembly where the two pieces uniquely mate to form a self-aligned configuration. A first part, in the form of a plate, is attached to the transparent lid in the area where the optical signals pass through. The first plate includes a central opening with inwardly-tapering sidewalls surrounding its periphery. A second plate is also formed to include a central opening and has a lower protrusion with inwardly-tapering sidewalls that mate with the inwardly-tapering sidewalls of the first plate to form the self-aligned connectorized fiber array assembly. The fiber array is then attached to the second plate in a self-aligned fashion.

    Abstract translation: 一种用于在光电子基板和光纤阵列之间提供自对准光耦合的装置，其中基板由透明盖包围，使得相关联的光信号通过透明盖进入和离开布置。 该装置采取两部分连接的光纤阵列组件的形式，其中两个部件独特地配合以形成自对准配置。 在光信号通过的区域中，透明盖附着有板的形式的第一部分。 第一板包括具有围绕其周边的向内逐渐变细的侧壁的中心开口。 第二板也形成为包括中心开口并且具有下突起，其具有向内渐缩的侧壁，与第一板的向内渐缩的侧壁配合形成自对准的连接纤维阵列组件。 然后将纤维阵列以自对准的方式附接到第二板。

    SOI-based photonic bandgap devices
    28.
    发明授权
    SOI-based photonic bandgap devices 有权
    基于SOI的光子带隙器件

    公开(公告)号：US07298949B2

    公开(公告)日：2007-11-20

    申请号：US11042774

    申请日：2005-01-24

    Applicant: Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

    Inventor： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

    IPC: G02B6/10 ,  G02B6/12

    CPC classification number: G02F1/025 ,  G02F2202/32

    Abstract: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

    Abstract translation: 基于SOI的光子带隙（PBG）电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束，从而显着减少光学损耗。 通过包括PBG结构，相关联的电触点可以放置在更接近有源区域而不影响光学性能，从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制，整个装置尺寸，电容和电阻也减小。

    Integrated approach for design, simulation and verification of monolithic, silicon-based opto-electronic circuits
    29.
    发明授权
    Integrated approach for design, simulation and verification of monolithic, silicon-based opto-electronic circuits 有权
    用于单片硅基光电路的设计，仿真和验证的综合方法

    公开(公告)号：US07269809B2

    公开(公告)日：2007-09-11

    申请号：US11159283

    申请日：2005-06-22

    Applicant: Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

    Inventor： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

    IPC: G06F17/50 ,  G06F17/10

    CPC classification number: G06F17/5036 ,  G06F17/5068

    Abstract: Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: (1) digital electronic integrated circuit elements; (2) analog/mixed signal electronic integrated circuit elements; and (3) opto-electronic elements (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated. A physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified, to assess the properties of the overall physical design. The results of the co-simulation are compared to the results of the co-verification, with alterations made in the logic design and/or the physical layout until the desired operating parameters are obtained. Once the desired results are generated, conventional wafer-level fabrication operations are then considered to provide a final product (“tape out”).

    Abstract translation: 计算机辅助设计（CAD）工具用于在单片硅基电光芯片中执行电气和光学部件的集成设计，验证和布局。 为最终的硅基单片结构中包含的三种不同类型的元件准备了独立的顶级行为逻辑设计：（1）数字电子集成电路元件; （2）模拟/混合信号电子集成电路元件; 和（3）光电元件（包括无源和有源光学元件）。 一旦行为逻辑设计完成，结果将被合并并共同模拟。 为电路中的每种不同类型的元件开发和验证物理布局设计。 然后将单独的物理布局共同验证，以评估整体物理设计的属性。 将共模拟的结果与协同验证的结果进行比较，在逻辑设计和/或物理布局中进行改变，直到获得所需的操作参数。 一旦产生期望的结果，则常规晶圆级制造操作被认为是提供最终产品（“磁带输出”）。

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