Method for fabricating semiconductor integrated circuit device
    28.
    发明授权
    Method for fabricating semiconductor integrated circuit device 失效
    制造半导体集成电路器件的方法

    公开(公告)号:US06458602B1

    公开(公告)日:2002-10-01

    申请号:US09889855

    申请日:2001-07-23

    IPC分类号: H01L2100

    摘要: According to the invention of the present application, for providing an etching technique for a wiring layer capable of decreasing the degradation of characteristics of a ferroelectric film in FeRAM, a wiring material (LI wiring 18, Al wiring 30) connected with an electrode layer of a ferroelectric film 11 (lower electrode 10, upper electrode 12) is fabricated by dry etching using inducely coupled plasma upon forming the wiring layer and, successively, applied with an asher treatment at a temperature of 300° C. or higher by using inducely coupled plasma while introducing a gas mixture, for example, of O2+CF4+H2O.

    摘要翻译: 根据本申请的发明,为了提供能够降低FeRAM中的铁电体膜的特性劣化的布线层的蚀刻技术,可以将与电极层的电极层连接的布线材料(LI布线18,Al布线30) 通过在形成布线层时使用诱导耦合等离子体进行干法蚀刻制造铁电体膜11(下电极10,上电极12),并且通过使用诱导耦合的方式在300℃以上的温度下进行灰处理 同时引入例如O 2 + CF 4 + H 2 O的气体混合物。

    Process for fabricating an integrated circuit device having a capacitor with an electrode formed at a high aspect ratio
    29.
    发明授权
    Process for fabricating an integrated circuit device having a capacitor with an electrode formed at a high aspect ratio 失效
    具有电容器的集成电路器件的制造方法,所述电容器具有以高纵横比形成的电极

    公开(公告)号:US06432835B1

    公开(公告)日:2002-08-13

    申请号:US09411643

    申请日:1999-10-04

    IPC分类号: H01L21461

    摘要: Fine etching of ruthenium or ruthenium oxide is suited for a ferroelectric and high dielectric film such as BST. Over a silicon oxide film 46 and a plug 49, a titanium nitride film 50, ruthenium film 51, ruthenium dioxide film 52 and silicon oxide film 53 are stacked successively. After patterning the silicon oxide film 53 with a resist film, the resist film is removed. In the presence of the patterned silicon oxide film 53, the ruthenium dioxide film 52 and ruthenium film 51 are etched under processing pressure of 15 mTorr, plasma source power of 500 W, RF bias power of 200 W, oxygen flow of 715 sccm, chlorine flow of 80 sccm, total flow of about 800 sccm, gas residence time of 49.3 msec, and over etching of 100%.

    摘要翻译: 钌或氧化钌的精细蚀刻适用于铁电和高介电膜如BST。 在氧化硅膜46和插头49上,依次层叠氮化钛膜50,钌膜51,二氧化钌膜52和氧化硅膜53。 在用抗蚀剂膜图案化氧化硅膜53之后,去除抗蚀剂膜。 在图案化的氧化硅膜53的存在下,在15mTorr的加工压力,500W的等离子体源功率,200W的RF偏置功率,715sccm的氧气流量,氯气流中蚀刻二氧化钌膜52和钌膜51 流量80sccm,总流量约800sccm,气体停留时间为49.3毫秒,过蚀刻为100%。