公开(公告)号：US10115677B2

公开(公告)日：2018-10-30

申请号：US15630346

申请日：2017-06-22

Applicant: Apple Inc.

Inventor： Meng Chi Lee ,  Shakti S. Chauhan ,  Flynn P. Carson ,  Jun Chung Hsu ,  Tha-An Lin

IPC: H01L29/00 ,  H01L23/552 ,  H01L23/528 ,  H01L23/31 ,  H01L23/522 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.

公开(公告)号：US20170301631A1

公开(公告)日：2017-10-19

申请号：US15630346

申请日：2017-06-22

Applicant: Apple Inc.

Inventor： Meng Chi Lee ,  Shakti S. Chauhan ,  Flynn P. Carson ,  Jun Chung Hsu ,  Tha-An Lin

IPC: H01L23/552 ,  H01L23/522 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/528

CPC classification number: H01L23/552 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81

Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.

公开(公告)号：US09633953B2

公开(公告)日：2017-04-25

申请号：US14518887

申请日：2014-10-20

Applicant: Apple Inc.

Inventor： Jun Chung Hsu ,  Jie-Hua Zhao

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/18161

Abstract: A methodology for addressing package warpage is described. In an embodiment a package includes a die mounted on a wiring board. Portion of a metal plane within the wiring board includes a reduced portion, characterized by a reduced thickness that is less than a baseline thickness.

公开(公告)号：US11545455B2

公开(公告)日：2023-01-03

申请号：US16423931

申请日：2019-05-28

Applicant: Apple Inc.

Inventor： Jun Chung Hsu ,  Chih-Ming Chung ,  Jun Zhai ,  Yifan Kao ,  Young Doo Jeon ,  Taegui Kim

IPC: H01L23/00

Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.

公开(公告)号：US20220336342A1

公开(公告)日：2022-10-20

申请号：US17230774

申请日：2021-04-14

Applicant: Apple Inc.

Inventor： Zheng Zhou ,  Jun Chung Hsu

IPC: H01L23/528 ,  H01Q1/22 ,  H01L23/66

Abstract: Routing substrates, methods of manufacture, and electronic assemblies including routing substrates are described. In an embodiment, a routing substrate includes a metal routing layer including a first set of first wiring traces and a second set of second wiring traces, where first top surfaces of the first wiring traces are characterized by a lower RMS surface roughness (Rq) than the second top surfaces of the second wiring traces.

公开(公告)号：US10109593B2

公开(公告)日：2018-10-23

申请号：US14947353

申请日：2015-11-20

Applicant: Apple Inc.

Inventor： Meng Chi Lee ,  Shakti S. Chauhan ,  Flynn P. Carson ,  Jun Chung Hsu ,  Tha-An Lin

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31

Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed over the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The substrate of the SiP may include at least some metallization along vertical walls in the end portions of the substrate. The metallization may provide a large contact area for coupling the metal shield to a ground ring coupled to the ground layer in the PCB. The metallization along the vertical walls in the end portions of the substrate may be formed as through-metal vias in a common substrate before singulation to form the SiP.

公开(公告)号：US20180082858A1

公开(公告)日：2018-03-22

申请号：US15826509

申请日：2017-11-29

Applicant: Apple Inc.

Inventor： Jun Chung Hsu ,  Flynn P. Carson ,  Kwan-Yu Lai

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/552 ,  H01L23/31 ,  H05K3/46

CPC classification number: H01L21/568 ,  H01L21/4857 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/5225 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16245 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K3/4682 ,  Y10T29/49156 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81

Abstract: Method of forming ultra thin coreless substrates are described. In an embodiment, the method utilizes a debond layer including high and low adhesion surface areas to the carrier substrate, and cutting through the low adhesion surface areas to remove a build-up structure from the carrier substrate. An electrical short layer may be formed as a part of or on the debond layer to facilitate electrical testing of the build-up structure prior to debonding, and aid in the formation a “known good” substrate on a support substrate.

公开(公告)号：US09899239B2

公开(公告)日：2018-02-20

申请号：US14935292

申请日：2015-11-06

Applicant: Apple Inc.

Inventor： Jun Chung Hsu ,  Flynn P. Carson ,  Kwan-Yu Lai

IPC: H05K3/02 ,  H05K3/10 ,  H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L23/552 ,  H01L23/31 ,  H01L23/00 ,  H05K3/46

CPC classification number: H01L21/568 ,  H01L21/4857 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16245 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K3/4682 ,  Y10T29/49156 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81

Abstract: Method of forming ultra thin coreless substrates are described. In an embodiment, the method utilizes a debond layer including high and low adhesion surface areas to the carrier substrate, and cutting through the low adhesion surface areas to remove a build-up structure from the carrier substrate. An electrical short layer may be formed as a part of or on the debond layer to facilitate electrical testing of the build-up structure prior to debonding, and aid in the formation a “known good” substrate on a support substrate.

公开(公告)号：US09721903B2

公开(公告)日：2017-08-01

申请号：US14976199

申请日：2015-12-21

Applicant: Apple Inc.

Inventor： Meng Chi Lee ,  Shakti S. Chauhan ,  Flynn P. Carson ,  Jun Chung Hsu ,  Tha-An Lin

IPC: H01L29/00 ,  H01L23/552 ,  H01L23/528 ,  H01L23/31 ,  H01L23/522 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/5226 ,  H01L23/528 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81

Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.

公开(公告)号：US20170148744A1

公开(公告)日：2017-05-25

申请号：US15042817

申请日：2016-02-12

Applicant: Apple Inc.

Inventor： Flynn P. Carson ,  Jun Chung Hsu ,  Meng Chi Lee ,  Shakti S. Chauhan

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/78 ,  H01L21/56

Abstract: Packages including substrate-less integrated components and methods of fabrication are described are described. In an embodiment, a packaging method includes attaching a ground structure to a carrier and a plurality of components face down to the carrier and laterally adjacent to the ground structure. The plurality of components are encapsulated within a molding compound, and the carrier is removed exposing a plurality of component terminals and a plurality of ground structure terminals. A plurality of packages are singulated.