Decoder with selective iteration scheduling
    21.
    发明授权
    Decoder with selective iteration scheduling 有权
    具有选择性迭代调度的解码器

    公开(公告)号:US09258015B2

    公开(公告)日:2016-02-09

    申请号:US14138809

    申请日:2013-12-23

    Applicant: Apple Inc.

    CPC classification number: H03M13/1111 H03M13/1128 H03M13/114 H03M13/3715

    Abstract: A method includes decoding a code word of an Error Correction Code (ECC), which is representable by a set of check equations, by performing a sequence of iterations, such that each iteration involves processing of multiple variable nodes. For one or more selected variable nodes, a count of the check equations that are defined over one or more variables held respectively by the one or more selected variable nodes is evaluated, and, when the count meets a predefined skipping criterion, the one or more selected variable nodes are omitted from a given iteration in the sequence.

    Abstract translation: 一种方法包括通过执行一系列迭代来解码纠错码(ECC)的代码字,其可由一组检验方程表示,使得每次迭代涉及多个可变节点的处理。 对于一个或多个选定的变量节点,评估在一个或多个所选变量节点分别保存的一个或多个变量上定义的检验方程的计数,并且当该计数满足预定的跳过标准时,该一个或多个 在序列中给定的迭代中省略了选定的变量节点。

    HIGH-PERFORMANCE ECC DECODER
    22.
    发明申请
    HIGH-PERFORMANCE ECC DECODER 审中-公开
    高性能ECC解码器

    公开(公告)号:US20150347230A1

    公开(公告)日:2015-12-03

    申请号:US14821124

    申请日:2015-08-07

    Applicant: Apple Inc.

    Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    Abstract translation: 用于纠错码(ECC)解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式(ELP)是基于综合征产生的。 识别至少一些ELP根,并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作,在给定的场元件上评估ELP,其中每个串行乘法器执行乘法周期序列,并在每个周期中产生中间结果。 响应于检测至少一个中期结果,指示给定的元素不是ELP根,在完成序列之前终止乘法循环。

    Distortion cancellation in 3-D non-volatile memory
    23.
    发明授权
    Distortion cancellation in 3-D non-volatile memory 有权
    3-D非易失性存储器中的失真取消

    公开(公告)号:US09122403B2

    公开(公告)日:2015-09-01

    申请号:US13897944

    申请日:2013-05-20

    Applicant: Apple Inc.

    Abstract: A method in a memory that includes multiple analog memory cells arranged in a three-dimensional (3-D) configuration, includes identifying multiple groups of potentially-interfering memory cells that potentially cause interference to a group of target memory cells. Partial distortion components, which are inflicted by the respective groups of the potentially-interfering memory cells on the target memory cells, are estimated. The partial distortion components are progressively accumulated so as to produce an estimated composite distortion affecting the target memory cells, while retaining only the composite distortion and not the partial distortion components. The target memory cells are read, and the interference in the target memory cells is canceled based on the estimated composite distortion.

    Abstract translation: 包括以三维(3-D)配置排列的多个模拟存储器单元的存储器中的方法包括识别潜在地对一组目标存储器单元造成干扰的潜在干扰存储器单元的多个组。 估计由目标存储器单元上的潜在干扰存储器单元的相应组造成的部分失真分量。 逐渐积累部分失真分量,以产生影响目标存储器单元的估计复合失真,同时仅保留复合失真而不保留部分失真分量。 读取目标存储器单元,并且基于估计的复合失真来消除目标存储器单元中的干扰。

    Management of Data Storage in Analog Memory Cells Using a Non-Integer Number of Bits Per Cell
    24.
    发明申请
    Management of Data Storage in Analog Memory Cells Using a Non-Integer Number of Bits Per Cell 有权
    使用每个单元的非整数位数来管理模拟存储器单元中的数据存储

    公开(公告)号:US20150179263A1

    公开(公告)日:2015-06-25

    申请号:US14135823

    申请日:2013-12-20

    Applicant: APPLE INC.

    Abstract: A method for data storage includes storing data in a group of memory cells, by encoding the data using at least an outer code and an inner code, and optionally inverting the encoded data prior to storing the encoded data in the memory cells. The encoded data is read from the memory cells, and inner code decoding is applied to the read encoded data to produce a decoding result. At least part of the read data is conditionally inverted, depending on the decoding result of the inner code.

    Abstract translation: 一种用于数据存储的方法包括:通过使用至少一个外部代码和一个内部代码对数据进行编码,以及在将编码数据存储在存储器单元中之前可选地反转编码数据,将数据存储在一组存储单元中。 从存储器单元读取编码数据,并将内码解码应用于读取的编码数据以产生解码结果。 根据内部代码的解码结果,至少部分读取数据有条件地反转。

    DISTORTION CANCELLATION IN 3-D NON-VOLATILE MEMORY
    25.
    发明申请
    DISTORTION CANCELLATION IN 3-D NON-VOLATILE MEMORY 有权
    三维非易失性存储器中的失败消除

    公开(公告)号:US20140344519A1

    公开(公告)日:2014-11-20

    申请号:US13897944

    申请日:2013-05-20

    Applicant: Apple, Inc.

    Abstract: A method in a memory that includes multiple analog memory cells arranged in a three-dimensional (3-D) configuration, includes identifying multiple groups of potentially-interfering memory cells that potentially cause interference to a group of target memory cells. Partial distortion components, which are inflicted by the respective groups of the potentially-interfering memory cells on the target memory cells, are estimated. The partial distortion components are progressively accumulated so as to produce an estimated composite distortion affecting the target memory cells, while retaining only the composite distortion and not the partial distortion components. The target memory cells are read, and the interference in the target memory cells is canceled based on the estimated composite distortion.

    Abstract translation: 包括以三维(3-D)配置排列的多个模拟存储器单元的存储器中的方法包括识别潜在地对一组目标存储器单元造成干扰的潜在干扰存储器单元的多个组。 估计由目标存储器单元上的潜在干扰存储器单元的相应组造成的部分失真分量。 逐渐积累部分失真分量,以产生影响目标存储器单元的估计复合失真,同时仅保留复合失真而不保留部分失真分量。 读取目标存储器单元,并且基于估计的复合失真来消除目标存储器单元中的干扰。

    Adaptation of analog memory cell read thresholds using partial ECC syndromes
    26.
    发明授权
    Adaptation of analog memory cell read thresholds using partial ECC syndromes 有权
    使用部分ECC综合征适应模拟存储器单元读取阈值

    公开(公告)号:US08869008B2

    公开(公告)日:2014-10-21

    申请号:US13743721

    申请日:2013-01-17

    Applicant: Apple Inc.

    Abstract: A method includes storing data that is encoded with an Error Correction Code (ECC) in a group of analog memory cells. The memory cells in the group are read using multiple sets of read thresholds. The memory cells in the group are divided into two or more subsets. N partial syndromes of the ECC are computed, each partial syndrome computed over readout results that were read using a respective set of the read thresholds from a respective subset of the memory cells. For each possible N-bit combination of N bit values at corresponding bit positions in the N partial syndromes, a respective count of the bit positions in which the combination occurs is determined, so as to produce a plurality of counts. An optimal set of read thresholds is calculated based on the counts, and data recovery is performed using the optimal read thresholds.

    Abstract translation: 一种方法包括将用错误校正码(ECC)编码的数据存储在一组模拟存储器单元中。 使用多组读取阈值读取组中的存储单元。 组中的存储单元被分成两个或多个子集。 计算ECC的N个部分综合征,在读出结果上计算每个部分校正子,这些读出结果使用来自存储器单元的相应子集的相应读取阈值集来读取。 对于N个部分综合征中的相应位位置的N个比特值的每个可能的N比特组合,确定组合发生的比特位置的相应计数,以产生多个计数。 基于计数计算出最佳读取阈值集,并且使用最佳读取阈值执行数据恢复。

    Data storage in analog memory cells using a non-integer number of bits per cell
    27.
    发明授权
    Data storage in analog memory cells using a non-integer number of bits per cell 有权
    使用每个单元的非整数位的模拟存储单元中的数据存储

    公开(公告)号:US08862964B2

    公开(公告)日:2014-10-14

    申请号:US14147714

    申请日:2014-01-06

    Applicant: Apple Inc.

    Abstract: A method for data storage includes, in a first programming phase, storing first data in a group of analog memory cells by programming the memory cells in the group to a set of initial programming levels. In a second programming phase that is subsequent to the first programming phase, second data is stored in the group by: identifying the memory cells in the group that were programmed in the first programming phase to respective levels in a predefined partial subset of the initial programming levels; and programming only the identified memory cells with the second data, so as to set at least some of the identified memory cells to one or more additional programming levels that are different from the initial programming levels.

    Abstract translation: 一种用于数据存储的方法包括在第一编程阶段通过将该组中的存储器单元编程为一组初始编程级别来将第一数据存储在一组模拟存储器单元中。 在第一编程阶段之后的第二编程阶段,通过以下方式将第二数据存储在组中:将在第一编程阶段中编程的组中的存储器单元识别为初始编程的预定义部分子集中的相应电平 水平; 以及仅使用所述第二数据来编程所识别的存储器单元,以便将所识别的存储器单元中的至少一些设置为与所述初始编程级别不同的一个或多个附加编程级别。

    Interference-aware assignment of programming levels in analog memory cells
    28.
    发明授权
    Interference-aware assignment of programming levels in analog memory cells 有权
    模拟存储器单元中编程级别的干扰感知分配

    公开(公告)号:US08839075B2

    公开(公告)日:2014-09-16

    申请号:US14064464

    申请日:2013-10-28

    Applicant: Apple Inc.

    Abstract: A method for data storage includes accepting data for storage in a memory including multiple analog memory cells. For each memory cell, a respective set of nominal analog values is assigned for representing data values to be stored in the memory cell, by choosing the nominal analog values for a given memory cell in a respective range that depends on interference between the given memory cell and at least one other memory cell in the memory. The data is stored in each memory cell using the respective selected set of the nominal analog values.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据。 对于每个存储器单元,通过在取决于给定存储器单元之间的干扰的相应范围内选择给定存储器单元的额定模拟值,分配相应的一组标称模拟值来表示要存储在存储单元中的数据值 以及存储器中的至少一个其它存储单元。 使用相应选定的标称模拟值集合将数据存储在每个存储单元中。

    CONFIGURABLE ENCODER FOR CYCLIC ERROR CORRECTION CODES
    29.
    发明申请
    CONFIGURABLE ENCODER FOR CYCLIC ERROR CORRECTION CODES 有权
    用于循环错误校正码的可配置编码器

    公开(公告)号:US20140053046A1

    公开(公告)日:2014-02-20

    申请号:US14060748

    申请日:2013-10-23

    Applicant: Apple Inc.

    Inventor: Micha Anholt

    Abstract: Apparatus for encoding includes a first processing stage, which is configured to filter input data with a first set of coefficients belonging to a first generator polynomial representing a first ECC, to produce a first output. A second processing stage is configured to filter the first output using a second set of coefficients belonging to a quotient polynomial, which is defined as a quotient of a second generator polynomial, representing a second ECC, divided by the first generator polynomial, to produce a second output. Ancillary circuitry has first and second operational modes and is coupled to the first and second processing stages so as to generate a first redundancy output corresponding to the first ECC based on the first output when operating in the first mode, and to generate a second redundancy output corresponding to the second ECC based on the second output when operating in the second mode.

    Abstract translation: 用于编码的装置包括第一处理级,其被配置为使用属于表示第一ECC的第一生成多项式的第一组系数来过滤输入数据,以产生第一输出。 第二处理阶段被配置为使用属于商多项式的第二组系数来对第一输出进行过滤,商系多项式被定义为表示第二ECC的第二生成多项式的商除以第一生成多项式,以产生 第二输出。 辅助电路具有第一和第二操作模式,并且耦合到第一和第二处理级,以便当在第一模式下操作时,基于第一输出产生对应于第一ECC的第一冗余输出,并产生第二冗余输出 在第二模式下操作时,基于第二输出对应于第二ECC。

    Interference-Aware Assignment of Programming Levels in Analog Memory Cells
    30.
    发明申请
    Interference-Aware Assignment of Programming Levels in Analog Memory Cells 有权
    模拟存储器单元中编程级别的干扰感知分配

    公开(公告)号:US20140053043A1

    公开(公告)日:2014-02-20

    申请号:US14064464

    申请日:2013-10-28

    Applicant: Apple Inc.

    Abstract: A method for data storage includes accepting data for storage in a memory including multiple analog memory cells. For each memory cell, a respective set of nominal analog values is assigned for representing data values to be stored in the memory cell, by choosing the nominal analog values for a given memory cell in a respective range that depends on interference between the given memory cell and at least one other memory cell in the memory. The data is stored in each memory cell using the respective selected set of the nominal analog values.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据。 对于每个存储器单元,通过在取决于给定存储器单元之间的干扰的相应范围内选择给定存储器单元的额定模拟值,分配相应的一组标称模拟值来表示要存储在存储单元中的数据值 以及存储器中的至少一个其它存储单元。 使用相应选定的标称模拟值集合将数据存储在每个存储单元中。

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