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    Efficient Readout from Memory Cells Using Data Compression
    21.
    发明申请
    Efficient Readout from Memory Cells Using Data Compression 审中-公开
    使用数据压缩对存储单元的高效读出

    公开(公告)号：US20160117130A1

    公开(公告)日：2016-04-28

    申请号：US14987324

    申请日：2016-01-04

    Applicant: Apple Inc.

    Inventor： Uri Perlmutter ,  Dotan Sokolov ,  Ofir Shalvi ,  Oren Golov

    IPC: G06F3/06

    CPC classification number: G06F3/0638 ,  G06F3/0604 ,  G06F3/0679 ,  G06F11/1008 ,  G06F12/08

    Abstract: A method for data storage includes storing data in a group of analog memory cells by writing respective input storage values to the memory cells in the group. After storing the data, respective output storage values are read from the analog memory cells in the group. Respective confidence levels of the output storage values are estimated, and the confidence levels are compressed. The output storage values and the compressed confidence levels are transferred from the memory cells over an interface to a memory controller.

    Abstract translation: 一种用于数据存储的方法包括通过将相应的输入存储值写入组中的存储器单元来将数据存储在一组模拟存储器单元中。 在存储数据之后，从组中的模拟存储器单元读取相应的输出存储值。 估计输出存储值的相对置信水平，并且压缩置信水平。 输出存储值和压缩置信水平通过接口从存储器单元传送到存储器控制器。

    Selective re-programming of analog memory cells
    22.
    发明授权
    Selective re-programming of analog memory cells 有权
    模拟存储单元的选择性重新编程

    公开(公告)号：US09153329B2

    公开(公告)日：2015-10-06

    申请号：US14336054

    申请日：2014-07-21

    Applicant: Apple Inc.

    Inventor： Naftali Sommer ,  Uri Perlmutter ,  Shai Winter

    IPC: G11C16/04 ,  G11C16/10 ,  G11C11/56 ,  G11C16/34 ,  G11C29/00

    CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C16/3459 ,  G11C29/78

    Abstract: A method for data storage includes defining, in a memory that includes multiple analog memory cells, an erased state, a set of non-erased programming states and a partial subset of the non-erased programming states. Data is initially stored in a first group of the analog memory cells by programming each of at least some of the memory cells in the first group from the erased state to a respective non-erased programming state selected from the set of non-erased programming states. After initially storing the data, a second group of the analog memory cells, which potentially cause interference to the first group, is programmed. After programming the second group, the first group is selectively re-programmed with the data by repeating programming of only the memory cells in the first group whose respective programming states belong to the partial subset.

    Abstract translation: 一种用于数据存储的方法包括在包括多个模拟存储器单元的存储器中定义擦除状态，一组未擦除的编程状态和未擦除编程状态的部分子集。 最初将数据存储在第一组模拟存储器单元中，通过将第一组中的至少一些存储单元中的每一个从擦除状态编程为从非擦除编程状态集合中选择的各自的非擦除编程状态 。 在最初存储数据之后，编程可能对第一组产生干扰的第二组模拟存储器单元。 在对第二组进行编程之后，通过重复仅对其各自编程状态属于部分子集的第一组中的存储器单元进行编程，对该第一组进行有选择地重新编程。

    HIERARCHICAL DATA STORAGE SYSTEM
    23.
    发明申请
    HIERARCHICAL DATA STORAGE SYSTEM 审中-公开
    分层数据存储系统

    公开(公告)号：US20150081973A1

    公开(公告)日：2015-03-19

    申请号：US14548664

    申请日：2014-11-20

    Applicant: Apple Inc.

    Inventor： Michael Shachar ,  Barak Rotbard ,  Oren Golov ,  Uri Perlmutter ,  Dotan Sokolov ,  Julian Vlaiko ,  Yair Schwartz

    IPC: G06F12/12

    CPC classification number: G06F12/12 ,  G06F3/0628 ,  G06F3/0683 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0638 ,  G06F13/1657 ,  G06F13/1668 ,  G06F13/18 ,  G06F2212/1024 ,  G06F2212/7208

    Abstract: A data storage system includes a plurality of non-volatile memory devices arranged in one or more sets, a main controller and one or more processors. The main controller is configured to accept commands from a host and to convert the commands into recipes. Each recipe includes a list of multiple memory operations to be performed sequentially in the non-volatile memory devices belonging to one of the sets. Each of the processors is associated with a respective set of the non-volatile memory devices, and is configured to receive one or more of the recipes from the main controller and to execute the memory operations specified in the received recipes in the non-volatile memory devices belonging to the respective set.

    Abstract translation: 数据存储系统包括以一个或多个集合排列的多个非易失性存储器件，主控制器和一个或多个处理器。 主控制器配置为接受来自主机的命令，并将命令转换为配方。 每个配方包括要在属于其中一个组的非易失性存储器件中顺序执行的多个存储器操作的列表。 每个处理器与相应的一组非易失性存储器设备相关联，并且被配置为从主控制器接收一个或多个配方并且执行在非易失性存储器中接收的配方中指定的存储器操作 属于相应集合的设备。

    MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT
    25.
    发明申请
    MEMORY DEVICE WITH INTERNAL SIGNAL PROCESSING UNIT 有权

    公开(公告)号：US20130227231A1

    公开(公告)日：2013-08-29

    申请号：US13860211

    申请日：2013-04-10

    Applicant: Apple Inc

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G06F12/00

    CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

    Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

    Adaptive Estimation of Memory Cell Read Thresholds
    26.
    发明申请
    Adaptive Estimation of Memory Cell Read Thresholds 有权
    存储单元读取阈值的自适应估计

    公开(公告)号：US20130121080A1

    公开(公告)日：2013-05-16

    申请号：US13734335

    申请日：2013-01-04

    Applicant: Apple Inc.

    Inventor： Naftali Sommer ,  Ofir Shalvi ,  Uri Perlmutter ,  Oren Golov ,  Eyal Gurgi ,  Micha Anholt ,  Dotan Sokolov

    IPC: G11C16/04

    CPC classification number: G11C16/04 ,  G11C8/20 ,  G11C11/5642 ,  G11C16/20 ,  G11C16/28 ,  G11C2211/5634

    Abstract: A method for operating a memory (28) that includes a plurality of analog memory cells (32) includes storing data in the memory by writing first storage values to the cells. Second storage values are read from the cells, and a Cumulative Distribution Function (CDF) of the second storage values is estimated. The estimated CDF is processed so as to compute one or more thresholds. A memory access operation is performed on the cells using the one or more thresholds.

    Abstract translation: 一种用于操作包括多个模拟存储单元（32）的存储器（28）的方法包括：通过向单元写入第一存储值来将数据存储在存储器中。 从单元读取第二存储值，并且估计第二存储值的累积分布函数（CDF）。 处理估计的CDF以计算一个或多个阈值。 使用一个或多个阈值对单元执行存储器存取操作。

    Communication device and method for performing radio communication
    27.
    发明授权
    Communication device and method for performing radio communication 有权

    公开(公告)号：US11005544B2

    公开(公告)日：2021-05-11

    申请号：US15137021

    申请日：2016-04-25

    Applicant: Apple Inc.

    Inventor： Thorsten Clevorn ,  Pablo Herrero ,  Uri Perlmutter ,  Ronen Kronfeld

    IPC: H04B7/0456 ,  H04B7/08 ,  H04B7/06 ,  H04B7/04 ,  H04L5/00 ,  H04W72/04 ,  H04W72/08 ,  H04W88/06

    Abstract: A communication device is described comprising a first antenna, a second antenna and a third antenna; a first transceiver configured to communicate using at least the first antenna; a second transceiver configured to communicate using at least the second antenna; and a controller configured to determine whether the third antenna is to be used by the first transceiver or the second transceiver based on a selection criterion and configured to control the first transceiver to communicate using the first antenna and the third antenna if the controller has determined that the third antenna is to be used by the first transceiver and to control the second transceiver to communicate using the second antenna and the third antenna if the controller has determined that the third antenna is to be used by the second transceiver.

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