公开(公告)号：US20220093458A1

公开(公告)日：2022-03-24

申请号：US17028259

申请日：2020-09-22

Applicant: Applied Materials, Inc.

Inventor： M. Arif Zeeshan ,  Kelvin Chan ,  Shantanu Kallakuri ,  Sony Varghese ,  John Hautala

IPC: H01L21/768 ,  H01L21/48

Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.

公开(公告)号：US11094544B2

公开(公告)日：2021-08-17

申请号：US16522226

申请日：2019-07-25

Applicant: Applied Materials, Inc.

Inventor： David Thompson ,  Benjamin Schmiege ,  Jeffrey W. Anthis ,  Abhijit Basu Mallick ,  Susmit Singha Roy ,  Ziqing Duan ,  Yihong Chen ,  Kelvin Chan ,  Srinivas Gandikota

IPC: H01L21/00 ,  H01L21/033 ,  C23F1/00 ,  H01L21/3213 ,  H01L21/321 ,  H01L21/768

Abstract: Processing methods comprising selectively orthogonally growing a first material through a mask to provide an expanded first material are described. The mask can be removed leaving the expanded first material extending orthogonally from the surface of the first material. Further processing can create a self-aligned via.

公开(公告)号：US20200243382A1

公开(公告)日：2020-07-30

申请号：US16848754

申请日：2020-04-14

Applicant: Applied Materials, Inc.

Inventor： Yihong Chen ,  Ziqing Duan ,  Abhijit Basu Mallick ,  Kelvin Chan

IPC: H01L21/768 ,  H01L21/3213 ,  H01L27/11582 ,  H01L23/532 ,  H01L21/02 ,  H01L21/285 ,  H01L27/11556 ,  H01L23/528 ,  H01L21/311

Abstract: Methods of wordline separation in semiconductor devices (e.g., 3D-NAND) are described. A metal film is deposited in the wordlines and on the surface of a stack of spaced oxide layers. The metal film is removed by high temperature oxidation and etching of the oxide or low temperature atomic layer etching by oxidizing the surface and etching the oxide in a monolayer fashion. After removal of the metal overburden, the wordlines are filled with the metal film.

公开(公告)号：US20190276931A1

公开(公告)日：2019-09-12

申请号：US16296718

申请日：2019-03-08

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Anantha K. Subramani ,  Joung Joo Lee ,  Farzad Houshmand ,  Kelvin Chan ,  Kenneth Starks ,  Xianmin Tang

IPC: C23C14/54 ,  H01L21/02 ,  H01L21/285 ,  C23C14/50 ,  C23C14/34

Abstract: Methods and apparatus for physical vapor deposition are provided herein. In some embodiments, an apparatus for physical vapor deposition (PVD) includes: a linear PVD source to provide a stream of material flux comprising material to be deposited on a substrate; and a substrate support having a support surface to support the substrate at a non-perpendicular angle to the linear PVD source, wherein the substrate support and linear PVD source are movable with respect to each other along an axis that is perpendicular to a plane of the support surface of the substrate support sufficiently to cause the stream of material flux to move over a working surface of the substrate disposed on the substrate support during operation.

公开(公告)号：US10410865B2

公开(公告)日：2019-09-10

申请号：US16128962

申请日：2018-09-12

Applicant: Applied Materials, Inc.

Inventor： David Thompson ,  Benjamin Schmiege ,  Jeffrey W. Anthis ,  Abhijit Basu Mallick ,  Susmit Singha Roy ,  Ziqing Duan ,  Yihong Chen ,  Kelvin Chan ,  Srinivas Gandikota

IPC: H01L21/00 ,  H01L21/033 ,  C23F1/00 ,  H01L21/3213 ,  H01L21/321 ,  H01L21/768

Abstract: Processing methods comprising selectively orthogonally growing a first material through a mask to provide an expanded first material are described. The mask can be removed leaving the expanded first material extending orthogonally from the surface of the first material. Further processing can create a self-aligned via.

公开(公告)号：US10354916B2

公开(公告)日：2019-07-16

申请号：US15986189

申请日：2018-05-22

Applicant: Applied Materials, Inc.

Inventor： Yihong Chen ,  Ziqing Duan ,  Abhijit Basu Mallick ,  Kelvin Chan

IPC: H01L21/4763 ,  H01L21/768 ,  H01L21/311 ,  H01L23/532 ,  H01L21/285 ,  H01L21/02 ,  H01L23/528 ,  H01L27/11556 ,  H01L27/11582

Abstract: Methods of wordline separation in semiconductor devices (e.g., 3D-NAND) are described. A metal film is deposited in the wordlines and on the surface of a stack of spaced oxide layers. The metal film is removed by high temperature oxidation and etching of the oxide or low temperature atomic layer etching by oxidizing the surface and etching the oxide in a monolayer fashion. After removal of the metal overburden, the wordlines are filled with the metal film.

公开(公告)号：US20170358483A1

公开(公告)日：2017-12-14

申请号：US15621120

申请日：2017-06-13

Applicant: Applied Materials, Inc.

Inventor： Susmit Singha Roy ,  Yihong Chen ,  Kelvin Chan ,  Abhijit Basu Mallick ,  Srinivas Gandikota

IPC: H01L21/762 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/43 ,  H01L21/32

CPC classification number: H01L21/76229 ,  H01L21/28202 ,  H01L21/32 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823481 ,  H01L29/43

Abstract: Methods comprising forming a film on at least one feature of a substrate surface are described. The film is expanded to fill the at least one feature and cause growth of the film from the at least one feature. Methods of forming self-aligned vias are also described.

公开(公告)号：US20170350013A1

公开(公告)日：2017-12-07

申请号：US15615790

申请日：2017-06-06

Applicant: Applied Materials, Inc.

Inventor： Kelvin Chan ,  Yihong Chen

IPC: C23C16/455 ,  C23C16/24 ,  C23C16/08

CPC classification number: C23C16/45527 ,  C23C16/0272 ,  C23C16/08 ,  C23C16/42 ,  C23C16/45551

Abstract: Methods for forming a nucleation layer on a substrate. In some embodiments, the processing method comprises sequential exposure to a first reactive gas comprising a metal precursor and a second reactive gas comprising a halogenated silane to form a nucleation layer on the surface of the substrate.

公开(公告)号：US20170309476A1

公开(公告)日：2017-10-26

申请号：US15491331

申请日：2017-04-19

Applicant: Applied Materials, Inc.

Inventor： Eswaranand Venkatasubramanian ,  Srinivas Gandikota ,  Kelvin Chan ,  Atashi Basu ,  Abhijit Basu Mallick

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/51 ,  H01L29/78

Abstract: A microelectronic device on a semiconductor substrate comprises: a gate electrode; and a spacer adjacent to the gate electrode, the spacer comprising: a the low-k dielectric film comprising one or more species of vanadium oxide, which is optionally doped, and an optional silicon nitride or oxide film. Methods comprise depositing a low-k dielectric film optionally sandwiched by a silicon nitride or oxide film to form a spacer adjacent to a gate electrode of a microelectronic device on a semiconductor substrate, wherein the low-k dielectric film comprises a vanadium-containing film.

公开(公告)号：US09613908B2

公开(公告)日：2017-04-04

申请号：US14943913

申请日：2015-11-17

Applicant: Applied Materials, Inc.

Inventor： Deenesh Padhi ,  Yihong Chen ,  Kelvin Chan ,  Abhijit Basu Mallick ,  Alexandros T. Demos ,  Mukund Srinivasan

IPC: H01L21/00 ,  H01L23/532 ,  H01L21/02 ,  C23C16/30 ,  C23C16/452 ,  C23C16/455 ,  H01L21/768

CPC classification number: H01L23/5329 ,  C23C16/30 ,  C23C16/452 ,  C23C16/45523 ,  H01L21/0214 ,  H01L21/02145 ,  H01L21/02167 ,  H01L21/02178 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/76834 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Implementations described herein generally relate to the formation of a silicon and aluminum containing layer. Methods described herein can include positioning a substrate in a process region of a process chamber; delivering a process gas to the process region, the process gas comprising an aluminum-containing gas and a silicon-containing gas; activating a reactant gas comprising a nitrogen-containing gas, a hydrogen containing gas, or combinations thereof; delivering the reactant gas to the process gas to create a deposition gas that deposits a silicon and aluminum containing layer on the substrate; and purging the process region. The above elements can be performed one or more times to deposit an etch stop stack.