公开(公告)号：US20210280451A1

公开(公告)日：2021-09-09

申请号：US16808688

申请日：2020-03-04

Applicant: Applied Materials, Inc.

Inventor： Jung Chan Lee ,  Praket P. Jha ,  Jingmei Liang ,  Shuchi Sunil Ojha

IPC: H01L21/762 ,  H01L21/3105 ,  H01L21/02

Abstract: Provided are methods of depositing a film in high aspect ratio (AR) structures with small dimensions. The method provides flowable deposition for seamless gap-fill, UV cure for increasing film density, film conversion to silicon oxide at low temperature, and film densification by low temperature inductively coupled plasma (ICP) treatment (

公开(公告)号：US10593543B2

公开(公告)日：2020-03-17

申请号：US15976945

申请日：2018-05-11

Applicant: Applied Materials, Inc.

Inventor： Milind Gadre ,  Praket P. Jha ,  Deenesh Padhi

IPC: H01L21/00 ,  H01L21/02 ,  C23C16/24 ,  C23C16/46 ,  C23C16/509

Abstract: Implementations described herein generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron-doped amorphous silicon (a-Si) layers on a semiconductor substrate. In one implementation, a method is provided. The method comprises generating a pressure within a processing volume between 2 Torr and 60 Torr. The method further comprises heating a substrate in the processing volume to a temperature between 300 degrees Celsius and 550 degrees Celsius. The method further comprises flowing a silane-containing gas mixture into the processing volume having the substrate positioned therein. The method further comprises flowing a borane-containing gas mixture into the processing volume having the substrate positioned therein and depositing a boron-doped amorphous silicon layer on the substrate.

公开(公告)号：US10373822B2

公开(公告)日：2019-08-06

申请号：US15816520

申请日：2017-11-17

Applicant: Applied Materials, Inc.

Inventor： Prashant Kumar Kulshreshtha ,  Sudha Rathi ,  Praket P. Jha ,  Saptarshi Basu ,  Kwangduk Douglas Lee ,  Martin J. Seamons ,  Bok Hoen Kim ,  Ganesh Balasubramanian ,  Ziqing Duan ,  Lei Jing ,  Mandar B. Pandit

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/458 ,  C23C16/46 ,  H01L21/033 ,  H01L21/66 ,  C23C16/26 ,  C23C16/04 ,  H01L21/311

Abstract: Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.

公开(公告)号：US09490116B2

公开(公告)日：2016-11-08

申请号：US14879043

申请日：2015-10-08

Applicant: Applied Materials, Inc.

Inventor： Michael Tsiang ,  Praket P. Jha ,  Xinhai Han ,  Nagarajan Rajagopalan ,  Bok Hoen Kim ,  Tsutomu Kiyohara ,  Subbalakshmi Sreekala

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L27/115

CPC classification number: H01L21/0217 ,  H01L21/02274 ,  H01L27/11582

Abstract: Embodiments of the disclosure provide methods and system for manufacturing film layers with minimum lithographic overlay errors on a semiconductor substrate. In one embodiment, a method for forming a film layer on a substrate includes supplying a deposition gas mixture including a silicon containing gas and a reacting gas onto a substrate disposed on a substrate support in a processing chamber, forming a plasma in the presence of the depositing gas mixture in the processing chamber, applying current to a plasma profile modulator disposed in the processing chamber while supplying the depositing gas mixture into the processing chamber, and rotating the substrate while depositing a film layer on the substrate.

Abstract translation: 本公开的实施例提供了在半导体衬底上制造具有最小光刻重叠误差的膜层的方法和系统。 在一个实施例中，用于在衬底上形成膜层的方法包括将包含含硅气体和反应气体的沉积气体混合物供给到设置在处理室中的衬底支撑体上的衬底上，在存在 在处理室中沉积气体混合物，将电流施加到设置在处理室中的等离子体轮廓调制器，同时将沉积气体混合物供应到处理室中，并且在衬底上沉积膜层的同时旋转衬底。

公开(公告)号：US09390910B2

公开(公告)日：2016-07-12

申请号：US14549380

申请日：2014-11-20

Applicant: Applied Materials, Inc.

Inventor： Prashant Kumar Kulshreshtha ,  Sudha Rathi ,  Praket P. Jha ,  Saptarshi Basu ,  Kwangduk Douglas Lee ,  Martin J. Seamons ,  Bok Hoen Kim ,  Ganesh Balasubramanian ,  Ziqing Duan ,  Lei Jing ,  Mandar B. Pandit

IPC: H01L21/443 ,  H01L21/02 ,  H01L21/66 ,  H01L21/033 ,  C23C16/458 ,  C23C16/46 ,  C23C16/455

CPC classification number: H01L21/02274 ,  C23C16/04 ,  C23C16/26 ,  C23C16/455 ,  C23C16/45502 ,  C23C16/45508 ,  C23C16/45565 ,  C23C16/458 ,  C23C16/4584 ,  C23C16/4586 ,  C23C16/46 ,  H01L21/02115 ,  H01L21/0337 ,  H01L21/31144 ,  H01L22/12

Abstract: Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.

Abstract translation: 用于调制一个或多个图案化膜的局部应力和覆盖误差的方法可以包括调节引入室主体的气体的气流分布，将腔体内的气体朝向衬底流动，旋转衬底， 通过使用双区加热器控制基板温度，来实现基板的边缘温度分布。 用于沉积膜的室可以包括包括一个或多个处理区域的室主体。 腔室主体可以包括气体分配组件，其具有用于将气体输送到一个或多个处理区域中的阻挡板。 阻挡板可以具有第一区域和第二区域，并且第一区域和第二区域各自可以具有多个孔。 腔体可以具有双区加热器。