Self-aligned process
    21.
    发明授权
    Self-aligned process 有权
    自我调整的过程

    公开(公告)号:US09343272B1

    公开(公告)日:2016-05-17

    申请号:US14592509

    申请日:2015-01-08

    Abstract: Methods of forming self-aligned structures on patterned substrates are described. The methods may be used to form metal lines or vias without the use of a separate photolithography pattern definition operation. Self-aligned contacts may be produced regardless of the presence of spacer elements. The methods include directionally ion-implanting a gapfill portion of a gapfill silicon oxide layer to implant into the gapfill portion without substantially ion-implanting the remainder of the gapfill silicon oxide layer (the sidewalls). Subsequently, a remote plasma is formed using a fluorine-containing precursor to etch the patterned substrate such that the gapfill portions of silicon oxide are selectively etched relative to other exposed portions exposed parallel to the ion implantation direction. Without ion implantation, the etch operation would be isotropic owing to the remote nature of the plasma excitation during the etch process.

    Abstract translation: 描述了在图案化衬底上形成自对准结构的方法。 该方法可用于形成金属线或通孔而不使用单独的光刻图案定义操作。 可以产生自对准的触点,而不管间隔元件的存在。 所述方法包括定向地离子注入间隙填充氧化硅层的间隙填充部分以注入到间隙填充部分中,而基本上不离子注入间隙填充氧化硅层(侧壁)的剩余部分。 随后,使用含氟前体形成远程等离子体以蚀刻图案化衬底,使得相对于平行于离子注入方向暴露的其它暴露部分选择性地蚀刻氧化硅的间隙填充部分。 在没有离子注入的情况下,蚀刻操作将是各向同性的,这是由于在蚀刻过程期间等离子体激发的远程特性。

    SILICON OXIDE SELECTIVE REMOVAL
    23.
    发明申请
    SILICON OXIDE SELECTIVE REMOVAL 有权
    氧化硅选择性去除

    公开(公告)号:US20160093506A1

    公开(公告)日:2016-03-31

    申请号:US14542394

    申请日:2014-11-14

    Abstract: A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch using plasma effluents formed in a remote plasma. The remote plasma excites a fluorine-containing precursor in combination with an oxygen-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents combine with water vapor or an alcohol. The combination react with the patterned heterogeneous structures to remove an exposed silicon oxide portion faster than a second exposed portion. The inclusion of the oxygen-containing precursor may suppress the second exposed portion etch rate and result in unprecedented silicon oxide etch selectivity.

    Abstract translation: 描述了在图案化的异质结构上蚀刻暴露的氧化硅的方法,并且包括使用在远程等离子体中形成的等离子体流出物的气相蚀刻。 远程等离子体与含氧前体组合起来激发含氟前体。 远程等离子体内的等离子体流出物流入基板处理区域,其中等离子体流出物与水蒸汽或醇组合。 该组合与图案化的异质结构反应以比第二暴露部分更快地去除暴露的氧化硅部分。 含氧前体的包含可以抑制第二暴露部分的蚀刻速率并产生前所未有的氧化硅蚀刻选择性。

    OXIDE ETCH SELECTIVITY ENHANCEMENT
    24.
    发明申请
    OXIDE ETCH SELECTIVITY ENHANCEMENT 有权
    氧化物选择性增强

    公开(公告)号:US20160093505A1

    公开(公告)日:2016-03-31

    申请号:US14530153

    申请日:2014-10-31

    Abstract: A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch using plasma effluents formed in a remote plasma. The remote plasma excites a fluorine-containing precursor in combination with an oxygen-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents combine with water vapor or an alcohol. The combination react with the patterned heterogeneous structures to remove an exposed silicon oxide portion faster than an exposed silicon nitride portion. The inclusion of the oxygen-containing precursor may suppress the silicon nitride etch rate and result in unprecedented silicon oxide etch selectivity.

    Abstract translation: 描述了在图案化的异质结构上蚀刻暴露的氧化硅的方法,并且包括使用在远程等离子体中形成的等离子体流出物的气相蚀刻。 远程等离子体与含氧前体组合起来激发含氟前体。 远程等离子体内的等离子体流出物流入基板处理区域,其中等离子体流出物与水蒸汽或醇组合。 该组合与图案化的异质结构反应以比暴露的氮化硅部分更快地去除暴露的氧化硅部分。 含氧前体的包含可以抑制氮化硅蚀刻速率并产生前所未有的氧化硅蚀刻选择性。

    Integrated oxide and nitride recess for better channel contact in 3D architectures
    27.
    发明授权
    Integrated oxide and nitride recess for better channel contact in 3D architectures 有权
    集成的氧化物和氮化物凹槽,用于在3D架构中更好的通道接触

    公开(公告)号:US09165786B1

    公开(公告)日:2015-10-20

    申请号:US14452220

    申请日:2014-08-05

    CPC classification number: H01L21/31116 H01L21/67207 H01L28/00 H01L29/66833

    Abstract: Methods of etching back an oxide-nitride-oxide (ONO) layer of a 3-d flash memory cell without breaking vacuum are described. The methods include recessing the two outer silicon oxide dielectric layers to expose the flanks of the thin silicon nitride layer. The silicon nitride layer is then etched back from all exposed sides to hasten the process on the same substrate processing mainframe. Both etching back the silicon oxide and etching back the silicon nitride use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. The process may also be reversed such that the silicon nitride is etched back first.

    Abstract translation: 描述了在不破坏真空的情况下将3-d闪存单元的氧化物 - 氮化物 - 氧化物(ONO)层刻蚀的方法。 这些方法包括使两个外部氧化硅介电层凹陷以暴露薄氮化硅层的侧面。 然后从所有暴露的侧面回蚀刻氮化硅层,以加速相同基板处理主机上的工艺。 两者都蚀刻氧化硅并且将附着在相同主机上的远程激发的含氟设备的氮化硅用途蚀刻回来,以便于在没有中间大气暴露的情况下执行这两种操作。 该方法也可以颠倒,使得首先蚀刻氮化硅。

    AIR GAPS BETWEEN COPPER LINES
    28.
    发明申请
    AIR GAPS BETWEEN COPPER LINES 有权
    铜线之间的空气流量

    公开(公告)号:US20150214092A1

    公开(公告)日:2015-07-30

    申请号:US14164874

    申请日:2014-01-27

    Abstract: Methods are described for forming “air gaps” between adjacent copper lines on patterned substrates. The common name “air gap” will be used interchangeably the more technically accurate “gas pocket” and both reflect a variety of pressures and elemental ratios. The gas pockets may be one or more pores within dielectric material located between copper lines. Adjacent copper lines may be bordered by a lining layer and air gaps may extend from one lining layer on one copper line to the lining layer of an adjacent copper line. The gas pockets can have a dielectric constant approaching one, favorably reducing interconnect capacitance compared with typical low-K dielectric materials.

    Abstract translation: 描述了用于在图案化基板上的相邻铜线之间形成“气隙”的方法。 通用名称“气隙”可以互换使用更技术上更精确的“气袋”,并且都反映了各种压力和元素比。 气穴可以是位于铜线之间的电介质材料内的一个或多个孔。 相邻的铜线可以由衬里层界定,并且气隙可以从一条铜线上的一个衬里层延伸到相邻铜线的衬里层。 与典型的低K电介质材料相比,气穴可以具有接近一个的介电常数,有利地减小互连电容。

    Conformal oxide dry etch
    29.
    发明授权
    Conformal oxide dry etch 有权
    保形氧化物干蚀刻

    公开(公告)号:US09093390B2

    公开(公告)日:2015-07-28

    申请号:US14314889

    申请日:2014-06-25

    Abstract: A method of etching silicon oxide from a trench is described which allows more homogeneous etch rates up and down the sides of the trench. One disclosed method includes a sequential introduction of (1) a hydrogen-containing precursor and then (2) a fluorine-containing precursor into a substrate processing region. The temperature of the substrate is low during each of the two steps in order to allow the reaction to proceed and form solid residue by-product. A second disclosed method reverses the order of steps (1) and (2) but still forms solid residue by-product. The solid residue by-product is removed by raising the temperature in a subsequent sublimation step regardless of the order of the two steps.

    Abstract translation: 描述了从沟槽蚀刻二氧化硅的方法,其允许沟槽侧面上下的更均匀的蚀刻速率。 一种公开的方法包括将(1)含氢前体和(2)含氟前体顺序地引入基板处理区域中。 为了使反应进行并形成固体残余物副产物,底物的温度在两个步骤中都是低的。 第二个公开的方法逆转步骤(1)和(2)的顺序,但仍然形成固体残余物副产物。 通过在随后的升华步骤中升高温度来去除固体残余副产物,而不管两个步骤的顺序如何。

    Dry-etch for selective oxidation removal
    30.
    发明授权
    Dry-etch for selective oxidation removal 有权
    干蚀刻用于选择性氧化去除

    公开(公告)号:US09064816B2

    公开(公告)日:2015-06-23

    申请号:US13839948

    申请日:2013-03-15

    Abstract: Methods of selectively etching tungsten oxide relative to tungsten, silicon oxide, silicon nitride and/or titanium nitride are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H2). Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the tungsten oxide. The plasmas effluents react with exposed surfaces and selectively remove tungsten oxide while very slowly removing other exposed materials. In some embodiments, the tungsten oxide selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region. The ion suppression element reduces or substantially eliminates the number of ionically-charged species that reach the substrate.

    Abstract translation: 描述了相对于钨,氧化硅,氮化硅和/或氮化钛选择性地蚀刻氧化钨的方法。 这些方法包括由含氟前体和/或氢(H 2)形成的远程等离子体蚀刻。 来自远程等离子体的等离子体流出物流入基板处理区域,其中等离子体流出物与氧化钨反应。 等离子体流出物与暴露的表面反应并选择性地去除氧化钨,同时非常缓慢地除去其它暴露的材料。 在一些实施方案中,氧化钨选择性部分地来自位于远程等离子体和基板处理区域之间的离子抑制元件的存在。 离子抑制元件减少或基本消除了到达衬底的离子充电物质的数量。

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