Gray level mask
    21.
    发明授权
    Gray level mask 失效
    灰度级面罩

    公开(公告)号:US5334467A

    公开(公告)日:1994-08-02

    申请号:US22516

    申请日:1993-02-25

    CPC分类号: G03F7/0035 G03F1/50

    摘要: A gray level mask suitable for photolithography is constructed of a transparent glass substrate which supports plural levels of materials having different optical transmissivities. In the case of a mask employing only two of these levels, one level may be constructed of a glass made partially transmissive by substitution of silver ions in place of metal ions of alkali metal silicates employed in the construction of the glass. The second layer may be made opaque by construction of the layer of a metal such as chromium. The mask is fabricated with the aid of a photoresist structure which is etched in specific regions by photolithographic masking to enable selective etching of exposed regions of the level of materials of differing optical transmissivities. Various etches are employed for selective etching of the photoresist, the metal of one of the layers, and the glass of the other of the layers. The etches include plasma etch with chloride ions to attack the chromium of the opaque layer, compounds of fluorine to attack the glass layer, and reactive ion etching with oxygen to attack the photoresist structure. Also, developer is employed for etching on hardened regions of resist in the photoresist structure.

    摘要翻译: 适用于光刻的灰度级掩模由透明玻璃基板构成,该透明玻璃基板支持具有不同透光率的多层材料。 在仅使用这些水平中的两个的掩模的情况下,一个层可以由通过取代银离子代替在玻璃的结构中使用的碱金属硅酸盐的金属离子而部分透射的玻璃构成。 第二层可以通过金属如铬的构造而变得不透明。 借助于光致抗蚀剂结构制造掩模,该光致抗蚀剂结构通过光刻掩模在特定区域中被蚀刻,以使得能够选择性地蚀刻具有不同光学透射率的材料层的暴露区域。 各种蚀刻用于选择性蚀刻光致抗蚀剂,其中一层的金属和另一层的玻璃。 蚀刻包括用氯离子等离子体蚀刻以侵蚀不透明层的铬,氟的化合物侵蚀玻璃层,以及用氧反应离子蚀刻以侵蚀光致抗蚀剂结构。 此外,显影剂用于蚀刻光致抗蚀剂结构中的抗蚀剂的硬化区域。

    Cooling microfan arrangements and process
    22.
    发明授权
    Cooling microfan arrangements and process 失效
    冷却微管安排和工艺

    公开(公告)号:US5296775A

    公开(公告)日:1994-03-22

    申请号:US950621

    申请日:1992-09-24

    IPC分类号: F04D25/08 H02N1/00

    CPC分类号: F04D25/08 H02N1/004

    摘要: A micro electrostatic cooling fan arrangement is provided which includes a heat source having a planar surface, a stator attached to the heat source, an axle attached to the heat source and spaced from the stator, a rotary element including a hub having an aperture therein and a fan blade, the axle passing through the aperture of the hub and the fan blade having a major surface thereof disposed at an angle with respect to the surface of the heat source and attached to the hub at one end, with the other end of the fan blade being adjacent to but spaced from the stator and a voltage source applied to the stator having sufficient voltage to charge the fan blade.Also, a process is provided for making a microfan which includes forming a strip of sacrificial material on a planar surface of a heat source, applying a spin on insulating layer over the heat source and the strip for producing a sloping surface extending from about the top of the strip toward the planar surface of the heat source, applying a layer of conductive material on the sloping surface and strip and defining from the layer of conductive material a fan blade on the sloping surface of the spin on insulating layer and a stator at one end of the fan blade.

    摘要翻译: 提供一种微静电冷却风扇装置,其包括具有平坦表面的热源,附接到热源的定子,附接到热源并与定子间隔开的轴;旋转元件,包括其中具有孔的旋转元件, 风扇叶片,通过轮毂的孔的轴和风扇叶片的主表面相对于热源的表面设置成一定角度并且在一端附接到轮毂,而另一端 风扇叶片与定子相邻但间隔开,并且施加到定子的电压源具有足够的电压以对风扇叶片充电。 此外,提供了一种制造微纤维的方法,其包括在热源的平坦表面上形成牺牲材料条,在绝热层上施加旋涂在热源和带上,用于产生从顶部延伸的倾斜表面 的条带朝向热源的平面表面,在倾斜表面上施加一层导电材料,并且从导电材料层划分并限定绝缘层上的自旋的倾斜表面上的风扇叶片和一个定子上的风扇叶片 风扇叶片的末端。

    Process for fabricating multi-level integrated circuit wiring structure
from a single metal deposit
    24.
    发明授权
    Process for fabricating multi-level integrated circuit wiring structure from a single metal deposit 失效
    从单一金属沉积物制造多层集成电路布线结构的工艺

    公开(公告)号:US4962058A

    公开(公告)日:1990-10-09

    申请号:US337807

    申请日:1989-04-14

    IPC分类号: H01L21/768

    CPC分类号: H01L21/76885

    摘要: A process of forming a multi-level semiconductor metallization structure from a single deposit layer of metal. The process provides the versatility of allowing stud-up, stud-down, thick and/or thin metallization structure lines to be formed from the single layer of metal. The thick metallization structure lines are low resistance lines, and the thin metallization lines are low capacitance lines. The separation of the thin metallization lines from the semiconductor substrate can be controlled further to decrease capacitive effects.

    摘要翻译: 从金属的单个沉积层形成多层半导体金属化结构的工艺。 该工艺提供了通过单一金属层形成分离,分层,厚和/或薄的金属化结构线的多功能性。 厚金属化结构线是低电阻线,薄金属化线是低电容线。 可以进一步控制薄金属化线与半导体衬底的分离以降低电容效应。

    Invention Review Board System and Method
    25.
    发明申请
    Invention Review Board System and Method 审中-公开
    发明审查委员会制度与方法

    公开(公告)号:US20090248468A1

    公开(公告)日:2009-10-01

    申请号:US12469460

    申请日:2009-05-20

    CPC分类号: A47L23/266 G06Q50/184

    摘要: A method of reviewing inventions using a review board made up of two or more members to determine a final disposition for the invention such as retaining the invention as a trade secret or filing a patent application for the invention. The review is conducted so that no unacceptable comments are made about the inventor or his/her invention. The method further involves identifying problems solved by the invention, identifying the elements of the invention in view of the problems and then drafting a claim in view of the elements. The claim is modified during the review process based on one or more parameters such as business value, prior art and operability of the invention. The review process may be performed by a computer program including user interfaces that facilitate review of the invention and determination of a final disposition for the invention.

    摘要翻译: 使用由两个或多个成员组成的审查委员会来审查发明的方法来确定本发明的最终处置,例如将本发明保留为商业秘密或为本发明提交专利申请。 进行审查,以便对发明人或其发明不作任何不可接受的评论。 该方法还涉及识别本发明所解决的问题,鉴于问题并鉴于这些要素起草一个权利要求来鉴定本发明的要素。 在审查过程中,基于一个或多个参数(例如业务价值,现有技术和本发明的可操作性)修改权利要求。 审查过程可以由计算机程序执行,该计算机程序包括便于审查本发明的用户界面以及本发明的最终处置的确定。

    Surface mount technology with masked cure
    26.
    发明授权
    Surface mount technology with masked cure 失效
    表面贴装技术,带有掩膜固化

    公开(公告)号:US06530412B1

    公开(公告)日:2003-03-11

    申请号:US09599300

    申请日:2000-06-21

    IPC分类号: B32B3128

    摘要: A method for temporarily attaching an electrical component to a pad, testing the component, removing and replacing the component if necessary, and making a final attachment of the component to the pad. The method provides for attachment and removal of components, to and from pads located on the substrate of a printed circuit board, wherein the method enables components to be easily removed prior to final assembly without damaging the circuit board or components mounted thereon. The method utilizes a layer of conductive, radiation-curable adhesive placed between the component's lead and the pad. Radiation is then directed through a mask onto a portion of the adhesive layer, which cures the portion while leaving a remaining area of the adhesive layer uncured. Because the portion of the adhesive layer that receives the radiation, and is consequently cured by the radiation, is only a limited portion of the whole adhesive layer, the component may be easily removed from the pad by applying a small mechanical force. Following such removal, the component or a replacement thereof may be attached to the remaining area. The final stage of the method cures the remaining area of uncured adhesive by exposing the remaining area to radiation.

    摘要翻译: 一种用于将电气部件临时附接到焊盘,测试部件,如果需要移除和更换部件的方法,以及将部件最终附接到焊盘。 该方法提供了附接和去除位于印刷电路板的基板上的焊盘的部件,其中该方法使得能够在最终组装之前容易地移除部件,而不会损坏安装在其上的电路板或部件。 该方法利用放置在部件的引线和焊盘之间的导电的可辐射固化的粘合剂层。 然后将辐射通过掩模引导到粘合剂层的一部分上,其固化该部分,同时留下未固化的粘合剂层的剩余区域。 由于接收辐射并因此被辐射固化的粘合剂层的部分仅仅是整个粘合剂层的有限部分,所以通过施加小的机械力可以容易地将该部件从焊盘移除。 在这种移除之后,组件或其替换可以附接到剩余区域。 该方法的最后阶段通过将剩余区域暴露于辐射来固化未固化的粘合剂的剩余面积。

    Stacked chip process carrier
    27.
    发明授权
    Stacked chip process carrier 失效
    堆叠芯片加工载体

    公开(公告)号:US06279815B1

    公开(公告)日:2001-08-28

    申请号:US09621561

    申请日:2000-07-21

    IPC分类号: B23K3102

    摘要: The present invention provides an apparatus and methods for holding a first semiconductor device in proper alignment to a second semiconductor device, whose size is different from the first device, while performing a C4 bond between the two devices. The apparatus for holding the two devices in proper alignment consists of a holding fixture, which includes upper and lower pocket receptacles for receiving the semiconductor devices. The semiconductor devices are placed into the respective upper and lower slots aligned to two or more edges of the holding fixture.

    摘要翻译: 本发明提供一种用于在与两个装置之间执行C4键的同时保持第一半导体器件与第一半导体器件的尺寸不同的第二半导体器件的正确对准的装置和方法。 用于将两个装置保持正确对准的装置包括保持夹具,其包括用于接收半导体装置的上部和下部口袋容器。 将半导体器件放置在与保持夹具的两个或更多个边缘对准的相应的上部和下部狭缝中。

    Method and apparatus for removing heat from a semiconductor device
    28.
    发明授权
    Method and apparatus for removing heat from a semiconductor device 失效
    从半导体器件去除热量的方法和装置

    公开(公告)号:US06246583B1

    公开(公告)日:2001-06-12

    申请号:US09262267

    申请日:1999-03-04

    IPC分类号: H05K720

    摘要: An apparatus and method are provided that remove sufficient heat from both SOI and non-SOI semiconductor devices to prevent the devices from overheating during operation. A plurality of thermally conductive pads such as electrically conductive studs are coupled to a first side of a semiconductor device having circuit elements formed thereon. The thermally conductive pads also are coupled to a substrate comprising an apparatus for extracting heat from the thermally conductive pads. The apparatus for extracting heat from the thermally conductive pads preferably comprises one or more metallic planes. A module cover having a thermally conductive path formed therein also may be coupled between the apparatus for extracting heat and a heat sink to further aid in heat removal from the semiconductor device. Thermally conductive pads may be coupled between the semiconductor device and I/O pins of the substrate to improve heat dissipation via the I/O pins.

    摘要翻译: 提供了一种装置和方法,其从SOI和非SOI半导体器件中去除足够的热量,以防止器件在工作期间过热。 诸如导电螺柱的多个导热焊盘耦合到其上形成有电路元件的半导体器件的第一侧。 导热焊盘还耦合到包括用于从导热焊盘提取热量的装置的衬底。 用于从导热垫提取热量的装置优选地包括一个或多个金属平面。 在其中形成有导热路径的模块盖也可以耦合在用于提取热量的设备和散热器之间,以进一步帮助从半导体器件散热。 导热焊盘可以耦合在半导体器件和衬底的I / O引脚之间,以改善通过I / O引脚的散热。

    Polysilicon mini spacer for trench buried strap formation
    29.
    发明授权
    Polysilicon mini spacer for trench buried strap formation 失效
    多晶硅迷你间隔件,用于沟槽埋层形成

    公开(公告)号:US06040213A

    公开(公告)日:2000-03-21

    申请号:US8873

    申请日:1998-01-20

    IPC分类号: H01L27/108 H01L21/8242

    CPC分类号: H01L27/10861

    摘要: A method for forming a semiconductor trench capacitor cell having a buried strap uses a substrate having a trench with a conductor separated from walls of the trench by a dielectric material. A portion of the dielectric material to a level below a top surface of the conductor is removed and at least a portion of the space thus formed is filled with a diffusible material. The buried strap is formed by annealing the conductor, the wall and the diffusible material so that conductive elements from the wall and the conductor diffuse into the diffusible material.

    摘要翻译: 用于形成具有掩埋带的半导体沟槽电容器单元的方法使用具有沟槽的衬底,该衬底具有通过介电材料与沟槽的壁分隔开的导体。 将电介质材料的一部分去除导体顶表面以下的水平,并且由此形成的空间的至少一部分用可扩散材料填充。 通过对导体,壁和可扩散材料进行退火而形成掩埋带,使得来自壁和导体的导电元件扩散到可扩散材料中。