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公开(公告)号：US5296775A
公开(公告)日：1994-03-22
申请号：US950621
申请日：1992-09-24
摘要： A micro electrostatic cooling fan arrangement is provided which includes a heat source having a planar surface, a stator attached to the heat source, an axle attached to the heat source and spaced from the stator, a rotary element including a hub having an aperture therein and a fan blade, the axle passing through the aperture of the hub and the fan blade having a major surface thereof disposed at an angle with respect to the surface of the heat source and attached to the hub at one end, with the other end of the fan blade being adjacent to but spaced from the stator and a voltage source applied to the stator having sufficient voltage to charge the fan blade.Also, a process is provided for making a microfan which includes forming a strip of sacrificial material on a planar surface of a heat source, applying a spin on insulating layer over the heat source and the strip for producing a sloping surface extending from about the top of the strip toward the planar surface of the heat source, applying a layer of conductive material on the sloping surface and strip and defining from the layer of conductive material a fan blade on the sloping surface of the spin on insulating layer and a stator at one end of the fan blade.
摘要翻译： 提供一种微静电冷却风扇装置，其包括具有平坦表面的热源，附接到热源的定子，附接到热源并与定子间隔开的轴;旋转元件，包括其中具有孔的旋转元件， 风扇叶片，通过轮毂的孔的轴和风扇叶片的主表面相对于热源的表面设置成一定角度并且在一端附接到轮毂，而另一端 风扇叶片与定子相邻但间隔开，并且施加到定子的电压源具有足够的电压以对风扇叶片充电。 此外，提供了一种制造微纤维的方法，其包括在热源的平坦表面上形成牺牲材料条，在绝热层上施加旋涂在热源和带上，用于产生从顶部延伸的倾斜表面 的条带朝向热源的平面表面，在倾斜表面上施加一层导电材料，并且从导电材料层划分并限定绝缘层上的自旋的倾斜表面上的风扇叶片和一个定子上的风扇叶片 风扇叶片的末端。
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公开(公告)号：US5326430A
公开(公告)日：1994-07-05
申请号：US164494
申请日：1993-12-07
摘要： A micro electrostatic cooling fan arrangement is provided which includes a heat source having a planar surface, a stator attached to the heat source, an axle attached to the heat source and spaced from the stator, a rotary element including a hub having an aperture therein and a fan blade, the axle passing through the aperture of the hub and the fan blade having a major surface thereof disposed at an angle with respect to the surface of the heat source and attached to the hub at one end, with the other end of the fan blade being adjacent to but spaced from the stator and a voltage source applied to the stator having sufficient voltage to charge the fan blade. Also, a process is provided for making a microfan which includes forming a strip of sacrificial material on a planar surface of a heat source, applying a spin on insulating layer over the heat source and the strip for producing a sloping surface extending from about the top of the strip toward the planar surface of the heat source, applying a layer of conductive material on the sloping surface and strip and defining from the layer of conductive material a fan blade on the sloping surface of the spin on insulating layer and a stator at one end of the fan blade.
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3.发明授权Process for forming multi-level coplanar conductor/insulator films employing photosensitive polymide polymer compositions 失效形成多层共晶导体/绝缘膜的方法使用感光聚合物聚合物组合物
公开(公告)号：US5229257A
公开(公告)日：1993-07-20
申请号：US516415
申请日：1990-04-30
申请人： John E. Cronin , Carter W. Kaanta , Pei-Ing P. Lee , Rosemary A. Previti-Kelly , James G. Ryan , Jung H. Yoon
发明人： John E. Cronin , Carter W. Kaanta , Pei-Ing P. Lee , Rosemary A. Previti-Kelly , James G. Ryan , Jung H. Yoon
IPC分类号： C08G73/10 , G03F7/038 , H01L21/312 , H01L21/768 , H01L23/522 , H05K3/00 , H05K3/04 , H05K3/10 , H05K3/46
CPC分类号： H01L21/76828 , H01L21/76807 , H01L21/76814 , H01L21/76825 , H01L23/5226 , H05K3/0023 , H05K3/467 , H01L2924/0002 , H01L2924/12044 , H05K2201/0154 , H05K3/045 , H05K3/107 , H05K3/465
摘要： Disclosed is a process for producing multi-level conductor/insulator films on a processed semiconductor substrate having a conductor pattern. The insulator layers, each comprise a photosensitive polyimide polymer composition, and this allows the desired wiring channels and stud vias to be formed directly in the insulator layers, without the use of separate masking layers and resulting image transfer steps, thus providing a less cumbersome and costly process.
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公开(公告)号：US5126006A
公开(公告)日：1992-06-30
申请号：US708608
申请日：1991-05-31
申请人： John E. Cronin , Paul A. Farrar, Sr. , Robert M. Geffken , William H. Guthrie , Carter W. Kaanta , Rosemary A. Previti-Kelly , James G. Ryan , Ronald R. Uttecht , Andrew J. Watts
发明人： John E. Cronin , Paul A. Farrar, Sr. , Robert M. Geffken , William H. Guthrie , Carter W. Kaanta , Rosemary A. Previti-Kelly , James G. Ryan , Ronald R. Uttecht , Andrew J. Watts
CPC分类号： G03F7/0035 , G03F1/50
摘要： A sequence of masking steps reduces the amount of transference of a workpiece among work stations and reduces certain tolerances required for mask alignment in the construction of integrated circuits, and a gray level mask suitable for photolithography. In the integrated circuit, masking layers are developed directly in a wafer for delineating vertical and horizontal portions of an electrically conductive path. The mask is constructed of a transparent glass substrate which supports plural levels of materials having different optical transmissivities. In the case of a mask employing only two of these levels, one level may be constructed of a glass made partially transmissive by substitution of silver ions in place of metal ions of alkali metal silicates employed in the construction of the glass. The second layer may be made opaque by construction of the layer of a metal such as chromium. Both the wafer and the mask are fabricated by a photoresist structure which is etched in specific regions by photolithographic masking to enable selective etching of exposed regions of the level of materials of differing optical transmissivities. Various etches are employed for selective etching of the photoresist and other ones of the layers. The etches include plasma etch with chloride ions to attack the chromium of the opaque layer, compounds of fluorine to attack the glass layer, and reactive ion etching with oxygen to attack the photoresist structure.
摘要翻译： 一系列掩蔽步骤减少了工件之间工件的移动量，并降低了集成电路结构中掩模对准所需的某些公差以及适用于光刻的灰度级掩模。 在集成电路中，掩模层直接在晶片中显影，用于描绘导电路径的垂直和水平部分。 掩模由透明玻璃基板构成，其支撑具有不同透光率的多层材料。 在仅使用这些水平中的两个的掩模的情况下，一个层可以由通过取代银离子代替在玻璃的结构中使用的碱金属硅酸盐的金属离子而部分透射的玻璃构成。 第二层可以通过金属如铬的构造而变得不透明。 晶片和掩模都通过光致抗蚀剂结构制造，该光致抗蚀剂结构通过光刻掩模在特定区域中被蚀刻，以使得能够选择性地蚀刻具有不同光学透射率的材料层的暴露区域。 各种蚀刻用于选择性蚀刻光致抗蚀剂和其它层。 蚀刻包括用氯离子等离子体蚀刻以侵蚀不透明层的铬，氟的化合物侵蚀玻璃层，以及用氧反应离子蚀刻以侵蚀光致抗蚀剂结构。
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5.发明授权Process for forming multi-level coplanar conductor/insulator films employing photosensitive polyimide polymer compositions 失效形成多层共晶导体/绝缘膜的方法使用感光性聚酰亚胺聚合物组合物
公开(公告)号：US5091289A
公开(公告)日：1992-02-25
申请号：US516394
申请日：1990-04-30
IPC分类号： C08L79/08 , H01L21/312 , H01L21/768 , H01L23/528
CPC分类号： H01L21/76828 , H01L21/76807 , H01L21/76814 , H01L21/76825 , H01L23/5283 , H01L2924/0002
摘要： Disclosed is a process for producing multi-level conductor/insulator films on a processed semiconductor substrate having a conductor pattern. The insulator layers, each comprise a photosensitive polyimide polymer composition, and this allows the desired wiring channels and stud vias to be formed directly in the insulator layers, without the use of separate masking layers and resulting image transfer steps, thus providing a less cumbersome and costly process.
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公开(公告)号：US5114754A
公开(公告)日：1992-05-19
申请号：US641036
申请日：1991-01-14
IPC分类号： B32B7/04 , B32B15/08 , B32B15/088 , B32B37/00 , C08G73/10 , C08J5/12 , C09D4/00 , C09D183/04 , C09D183/08 , G03F7/075 , G03F7/09 , H01L21/312 , H05K3/28
CPC分类号： H01L21/3121 , C08G73/106 , C09D4/00 , G03F7/0757 , G03F7/094 , H01L21/312
摘要： Disclosed is a process for passivating a metal surface in a metal/polyimide structure, such as a polyimide layer on a semiconductor substrate containing a pattern of metallization. The process invovles the formation of an intermediate layer of a silsesquioxane polymer between the polyimide layer and the substrate. The silsesquioxane layer passivates the metal, to inhibit interaction between the metal surface and the polyimide precursor material used in forming the polyimide, to provide a moisture-resistant and oxidation-resistant interface.
摘要翻译： 公开了一种在包含金属化图案的半导体衬底上的金属/聚酰亚胺结构如聚酰亚胺层中钝化金属表面的方法。 该方法在聚酰亚胺层和基底之间形成了倍半硅氧烷聚合物的中间层。 倍半硅氧烷层钝化金属，以抑制金属表面与形成聚酰亚胺所用的聚酰亚胺前体材料之间的相互作用，以提供耐湿和抗氧化的界面。
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公开(公告)号：US5194928A
公开(公告)日：1993-03-16
申请号：US842307
申请日：1992-02-26
IPC分类号： C08G73/10 , C09D4/00 , G03F7/075 , G03F7/09 , H01L21/312
CPC分类号： H01L21/3121 , C08G73/106 , C09D4/00 , G03F7/0757 , G03F7/094 , H01L21/312 , Y10S438/958
摘要： Disclosed is a process for passivating a metal surface in a metal/polyimide structure, such as a polyimide layer on a semiconductor substrate containing a pattern of metallization. The process involves the formation of an intermediate layer of a silsesquioxane polymer between the polyimide layer and the substrate. The silsesquioxane layer passivates the metal, to inhibit interaction between the metal surface and the polyimide precursor material used in forming the polyimide, to provide a moisture-resistant and oxidation-resistant interface.
摘要翻译： 公开了一种在包含金属化图案的半导体衬底上的金属/聚酰亚胺结构如聚酰亚胺层中钝化金属表面的方法。 该方法涉及在聚酰亚胺层和基底之间形成倍半硅氧烷聚合物的中间层。 倍半硅氧烷层钝化金属，以抑制金属表面与形成聚酰亚胺所用的聚酰亚胺前体材料之间的相互作用，以提供耐湿和抗氧化的界面。
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公开(公告)号：US5466636A
公开(公告)日：1995-11-14
申请号：US946993
申请日：1992-09-17
申请人： John E. Cronin , Carter W. Kaanta , Donald M. Kenney , Michael L. Kerbaugh , Howard S. Landis , Brian J. Machesney , Paul Parries , Rosemary A. Previti-Kelly , John F. Rembetski
发明人： John E. Cronin , Carter W. Kaanta , Donald M. Kenney , Michael L. Kerbaugh , Howard S. Landis , Brian J. Machesney , Paul Parries , Rosemary A. Previti-Kelly , John F. Rembetski
IPC分类号： H01L21/28 , H01L21/60 , H01L21/768 , H01L21/8242 , H01L29/417 , H01L21/44
CPC分类号： H01L27/10861 , H01L21/76838 , H01L21/76897 , H01L29/41766 , Y10S438/943
摘要： A semiconductor fabrication process for forming borderless contacts (130, 170, 172) using a removable mandrel (110). The process involves depositing a mandrel on an underlying barrier layer (100) designed to protect underlying structures (40) formed on a substrate (24). The mandrel is made from a material that will etch at a faster rate than the barrier layer so as to permit the formation of openings in the mandrel to be stopped on the barrier layer without penetrating such layer. After depositing a contact (130) in a first opening (120) formed in the mandrel, a second opening (140) is formed and a second contact (170) is deposited therein. Thereafter, the mandrel is removed and replaced with a layer of solid dielectric material (180).
摘要翻译： 一种用于使用可移除心轴（110）形成无边界触点（130,170,172）的半导体制造工艺。 该方法包括将心轴沉积在设计成保护形成在基底（24）上的下面的结构（40）的下面的阻挡层（100）上。 心轴由将以比阻挡层更快的速度蚀刻的材料制成，以允许心轴中的开口形成停止在阻挡层上而不穿透该层。 在将形成在心轴中的第一开口（120）中的接触（130）沉积之后，形成第二开口（140），并且在其中沉积第二接触（170）。 此后，移去心轴并用一层固体电介质材料（180）代替。
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公开(公告)号：US5233263A
公开(公告)日：1993-08-03
申请号：US722768
申请日：1991-06-27
CPC分类号： H01J9/025 , H01J1/3042
摘要： Lateral cathode field emission devices and methods of fabrication are set forth. Conventional integrated circuit fabrication techniques are advantageously used to produce the lateral FEDs. Cathode tips on the order of several hundred angstroms are consistently obtained as well as exact spacing of the cathode to gate and cathode to anode. Various cathode and device configurations are described, including a circular field emission device. A single integrated structure having multiple cathodes and multiple gates is possible to perform various logic operations and/or enhance current output from the device. Multiple field effect devices, with cathodes disposed parallel or perpendicular to the substrate, are integrally coupled through a sharing of one or more metallization layers definitive of the elements of the devices. Significant advantages in current density and circuit layout can be obtained. Methods for fabricating the various devices are also explained.
摘要翻译： 阐述了侧向阴极场发射器件及其制造方法。 传统的集成电路制造技术有利地用于产生横向FED。 一贯获得数百埃数量级的阴极尖端，以及阴极与栅极和阴极与阳极的精确间距。 描述了各种阴极和器件配置，包括圆形场致发射器件。 具有多个阴极和多个栅极的单个集成结构可以执行各种逻辑操作和/或增强来自该器件的电流输出。 具有平行或垂直于衬底设置的阴极的多个场效应器件通过共享设备元件的一个或多个金属化层而被一体地耦合。 可以获得电流密度和电路布局的显着优点。 还说明了制造各种装置的方法。
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公开(公告)号：US5308439A
公开(公告)日：1994-05-03
申请号：US13607
申请日：1993-02-04
CPC分类号： H01J9/025 , H01J1/3042
摘要： Lateral cathode field emission devices and methods of fabrication are set forth. Conventional integrated circuit fabrication techniques are advantageously used to produce the lateral FEDs. Cathode tips on the order of several hundred angstroms are consistently obtained as well as exact spacing of the cathode to gate and cathode to anode. Various cathode and device configurations are described, including a circular field emission device. A single integrated structure having multiple cathodes and multiple gates is possible to perform various logic operations and/or enhance current output from the device. Multiple field effect devices, with cathodes disposed parallel or perpendicular to the substrate, are integrally coupled through a sharing of one or more metallization layers definitive of the elements of the devices. Significant advantages in current density and circuit layout can be obtained. Methods for fabricating the various devices are also explained.
摘要翻译： 阐述了侧向阴极场发射器件及其制造方法。 传统的集成电路制造技术有利地用于产生横向FED。 一贯获得数百埃数量级的阴极尖端，以及阴极与栅极和阴极与阳极的精确间距。 描述了各种阴极和器件配置，包括圆形场致发射器件。 具有多个阴极和多个栅极的单个集成结构可以执行各种逻辑操作和/或增强来自该器件的电流输出。 具有平行或垂直于衬底设置的阴极的多个场效应器件通过共享设备元件的一个或多个金属化层而被一体地耦合。 可以获得电流密度和电路布局的显着优点。 还说明了制造各种装置的方法。
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