公开(公告)号：US20150187962A1

公开(公告)日：2015-07-02

申请号：US14468987

申请日：2014-08-26

Applicant: Hyundai Motor Company

Inventor： Dae Hwan Chun ,  Kyoung-Kook Hong ,  Jong Seok Lee ,  Junghee Park ,  Youngkyun Jung

IPC: H01L29/872 ,  H01L29/16 ,  H01L21/04 ,  H01L29/66

CPC classification number: H01L29/872 ,  H01L21/046 ,  H01L21/0495 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/6606

Abstract: A Schottky barrier diode includes: an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate; a first p+ region disposed on the n− type epitaxial layer; an n type epitaxial layer disposed on the n− type epitaxial layer and the first p+ region; a second p+ region disposed on the n type epitaxial layer, and being in contact with the first p+ region; a Schottky electrode disposed on the n type epitaxial layer and the second p+ region; and an ohmic electrode disposed on a second surface of the n+ type silicon carbide substrate. Also, the first p+ region has a lattice shape including a plurality of vertical portions and horizontal portions connecting both ends of the respective vertical portions to each other.

Abstract translation: 肖特基势垒二极管包括：n型外延层，设置在n +型碳化硅衬底的第一表面上; 布置在所述n型外延层上的第一p +区; 设置在n型外延层和第一p +区上的n型外延层; 设置在所述n型外延层上并与所述第一p +区接触的第二p +区; 设置在n型外延层和第二p +区上的肖特基电极; 以及设置在n +型碳化硅衬底的第二表面上的欧姆电极。 此外，第一p +区域具有包括将各个垂直部分的两端彼此连接的多个垂直部分和水平部分的格子形状。

公开(公告)号：US20150076515A1

公开(公告)日：2015-03-19

申请号：US14143649

申请日：2013-12-30

Applicant: Hyundai Motor Company

Inventor： Youngkyun Jung ,  Dae Hwan Chun ,  Kyoung-Kook Hong ,  Jong Seok Lee ,  Junghee Park

IPC: H01L29/872 ,  H01L29/16 ,  H01L29/66

CPC classification number: H01L29/872 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/6606

Abstract: A Schottky barrier diode and a method of manufacturing the diode are provided. The diode includes an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate and a plurality of p+ regions disposed within the n− type epitaxial layer. An n+ type epitaxial layer is disposed on the n− type epitaxial layer, a Schottky electrode is disposed on the n+ type epitaxial layer, and an ohmic electrode is disposed on a second surface of the n+ type silicon carbide substrate. The n+ type epitaxial layer includes a plurality of pillar parts disposed on the n− type epitaxial layer and a plurality of openings disposed between the pillar parts and that expose the p+ regions. Each of the pillar parts includes substantially straight parts that contact the n− type epitaxial layer and substantially curved parts that extend from the substantially straight parts.

Abstract translation: 提供肖特基势垒二极管和制造二极管的方法。 二极管包括设置在n +型碳化硅衬底的第一表面上的n型外延层和设置在n型外延层内的多个p +区。 在n型外延层上设置n +型外延层，在n +型外延层上设置肖特基电极，在n +型碳化硅基板的第二面上设置欧姆电极。 n +型外延层包括设置在n型外延层上的多个柱部分和设置在柱部分之间并暴露p +区域的多个开口。 每个支柱部分包括接触n型外延层的基本上直的部分和从基本上直的部分延伸的基本上弯曲的部分。

公开(公告)号：US08586434B1

公开(公告)日：2013-11-19

申请号：US13729534

申请日：2012-12-28

Applicant: Hyundai Motor Company

Inventor： Youngkyun Jung ,  Kyoung-Kook Hong ,  Jong Seok Lee ,  Dae Hwan Chun

IPC: H01L21/00

CPC classification number: H01L29/7827 ,  H01L29/66068

Abstract: A method of manufacturing a semiconductor device may include forming a first n− type epitaxial layer by performing a first epitaxial growth on a first surface of an n+ type silicon carbide substrate, forming a photosensitive layer pattern on the first n− type epitaxial layer, etching the first n− type epitaxial layer by using the photosensitive layer pattern as a mask to form a first trench, forming a buffer layer on the first n− type epitaxial layer after the photosensitive layer pattern may be removed, etching the buffer layer to form a trench passivation layer in the first trench, forming an n− type epitaxial layer by performing a second epitaxial growth on the first n− type epitaxial layer, and forming a p type epitaxial layer by performing a third epitaxial growth on the n− type epitaxial layer other than the portion on which the trench passivation layer may be formed.

Abstract translation: 制造半导体器件的方法可以包括通过在n +型碳化硅衬底的第一表面上进行第一外延生长来形成第一n型外延层，在第一n-型外延层上形成感光层图案，蚀刻 通过使用感光层图案作为掩模来形成第一沟槽的第一n型外延层，在可以去除感光层图案之后在第一n型外延层上形成缓冲层，蚀刻缓冲层以形成 在第一沟槽中的沟槽钝化层，通过在第一n型外延层上进行第二外延生长形成n型外延层，并通过在n型外延层上进行第三外延生长形成p型外延层 可以形成沟槽钝化层的部分。

公开(公告)号：US11990527B2

公开(公告)日：2024-05-21

申请号：US17514947

申请日：2021-10-29

Applicant: Hyundai Motor Company ,  Kia Corporation

Inventor： Junghee Park ,  Dae Hwan Chun ,  Jungyeop Hong ,  Youngkyun Jung ,  Nackyong Joo

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/42364 ,  H01L29/401 ,  H01L29/51 ,  H01L29/512 ,  H01L29/518 ,  H01L29/66712 ,  H01L29/7802

Abstract: A semiconductor device includes an n− type layer on a first surface of the substrate, a p type region on a part of the n− type layer, a gate on the n− type layer and the p type region, a first gate protection layer on the gate and a second gate protection layer on the first gate protection layer, a source on the second gate protection layer and the p type region, and a drain on the second surface of the substrate.

公开(公告)号：US10964783B2

公开(公告)日：2021-03-30

申请号：US16458454

申请日：2019-07-01

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Dae Hwan Chun

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/10 ,  H01L29/16

Abstract: A semiconductor device according to an exemplary embodiment of the present disclosure includes a substrate, an n− type layer, a plurality of trenches, a p type region, a p+ type region, an n+ type region, a gate electrode, a source electrode, and a drain electrode. The semiconductor device may include a plurality of unit cells. A unit cell among the plurality of unit cells may include a contact portion with which the source electrode and the n+ type region are in contact, a first branch part disposed above the contact portion on a plane, and a second branch part disposed below the contact portion on a plane, the plurality of trenches are separated from each other and disposed with a stripe shape on a plane.

公开(公告)号：US10403748B2

公开(公告)日：2019-09-03

申请号：US15828898

申请日：2017-12-01

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Dae Hwan Chun

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/78 ,  H01L29/423 ,  H01L29/08

Abstract: A semiconductor device includes: an n+ type of silicon carbide substrate, an n− type of layer, first trenches, a p type of region, a p+ type of region, an n+ type of region, a gate electrode, a source electrode, and a drain electrode. The semiconductor device may include a plurality of unit cells, wherein one of the plurality of unit cells may include a contact portion at which the source electrode and the p+ type of region contact each other, an outer portion disposed at upper and lower portions of the contact portion in a plan view, and a connection portion connecting the contact portion to the outer portion, a width between the first trenches horizontally adjacent in the plan view in the contact portion is equal to a width between the first trenches horizontally adjacent in the plan view in the outer portion, and a width between the first trenches horizontally adjacent in the plan view in the connection portion is less than a width between the first trenches horizontally adjacent in the plan view in the contact portion.

公开(公告)号：US20190189799A1

公开(公告)日：2019-06-20

申请号：US15980064

申请日：2018-05-15

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Dae Hwan Chun

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L29/08

CPC classification number: H01L29/7813 ,  H01L21/26513 ,  H01L29/0865 ,  H01L29/66734

Abstract: A semiconductor device is provided and includes an n− type layer disposed at a substrate first surface. A trench, n type region, and p+ type region are disposed on the n− type layer. A p type region is disposed on the n type region. An n+ type region is disposed on the p type region. A gate insulating layer is disposed in the trench. A gate electrode is disposed on the gate insulating layer. A source electrode is disposed on an insulating layer disposed on the gate electrode, n+ type region, and p+ type region. A drain electrode is disposed at a substrate second surface. The n type region includes a first portion contacting the trench side surface and extending parallel to a substrate upper surface and a second portion contacting the first portion, separated from the trench side surface, and extending vertical to the substrate upper surface.

公开(公告)号：US20180166541A1

公开(公告)日：2018-06-14

申请号：US15632842

申请日：2017-06-26

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Dae Hwan Chun

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L29/1608 ,  H01L29/4236 ,  H01L29/66 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/7827 ,  H01L29/7831

Abstract: A semiconductor device is provided. The semiconductor device includes a n− type layer disposed at a first surface of a n+ type silicon carbide substrate and a trench disposed at the n− type layer. Additionally, a first gate electrode and a second gate electrode are disposed in the trench and separated from each other. A source electrode is insulated from the first gate electrode and the second gate electrode. Further, the semiconductor includes a drain electrode that is disposed at a second surface of the n+ type silicon carbide substrate, a first channel disposed adjacent to a side surface of the trench and a second channel disposed under the lower surface of the trench. The first channel and the second channel are separated from each other.

公开(公告)号：US09972597B2

公开(公告)日：2018-05-15

申请号：US14800613

申请日：2015-07-15

Applicant: HYUNDAI MOTOR COMPANY

Inventor： Kyoung-Kook Hong ,  Hyun Woo Noh ,  Youngkyun Jung ,  Dae Hwan Chun ,  Jong Seok Lee ,  Su Bin Kang

IPC: B23K31/00 ,  B23K35/00 ,  H01L23/00 ,  B23K35/02 ,  B23K35/26 ,  B23K35/30 ,  B23K20/02 ,  B23K20/16 ,  B23K20/233 ,  H05K3/34 ,  B23K101/42 ,  B23K103/16

CPC classification number: H01L24/83 ,  B23K20/026 ,  B23K20/16 ,  B23K20/233 ,  B23K35/025 ,  B23K35/264 ,  B23K35/3006 ,  B23K2101/42 ,  B23K2103/166 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13294 ,  H01L2224/13313 ,  H01L2224/13339 ,  H01L2224/16227 ,  H01L2224/16505 ,  H01L2224/29294 ,  H01L2224/29313 ,  H01L2224/29339 ,  H01L2224/32227 ,  H01L2224/32505 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81825 ,  H01L2224/8184 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2924/00015 ,  H01L2924/10272 ,  H01L2924/201 ,  H01L2924/2075 ,  H01L2924/20751 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/10166 ,  H05K2203/1131 ,  H01L2224/29388 ,  H01L2924/00014 ,  H01L2224/13388 ,  H01L2924/00012

Abstract: A method for bonding with a silver paste includes coating a semiconductor device or a substrate with the silver paste. The silver paste contains a plurality of silver particles and a plurality of bismuth particles. The method further includes disposing the semiconductor on the substrate and forming a bonding layer by heating the silver paste, wherein the semiconductor and the substrate are bonded to each other by the bonding layer.

公开(公告)号：US09865701B2

公开(公告)日：2018-01-09

申请号：US15440657

申请日：2017-02-23

Applicant: Hyundai Motor Company

Inventor： Youngkyun Jung ,  Junghee Park ,  Dae Hwan Chun ,  JongSeok Lee

IPC: H01L29/66 ,  H01L29/16 ,  H01L21/02 ,  H01L29/872 ,  H01L23/535 ,  H01L21/768 ,  H01L21/265 ,  H01L21/306

CPC classification number: H01L29/66143 ,  H01L21/02529 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/76895 ,  H01L23/535 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A Schottky barrier diode includes: an n+ type of silicon carbide substrate; an n− type of epitaxial layer formed on a first surface of the n+ type of silicon carbide substrate; a plurality of p+ regions formed inside the n− type of epitaxial layer; a Schottky electrode formed in an upper portion of the n− type of epitaxial layer of an electrode region; and an ohmic electrode formed on a second surface of the n+ type of silicon carbide substrate, wherein the plurality of p+ regions are formed to be spaced apart from each other at a predetermined interval within the n− type of epitaxial layer.