利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

171 条记录 (耗时 0.031 秒)

    Method of fabricating flash memory device
    21.
    发明申请
    Method of fabricating flash memory device 审中-公开
    制造闪存设备的方法

    公开(公告)号：US20060205149A1

    公开(公告)日：2006-09-14

    申请号：US11151016

    申请日：2005-06-13

    申请人： Seung Lee ,  Pil Song

    发明人： Seung Lee ,  Pil Song

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28247 ,  H01L29/40114 ,  H01L29/513 ,  H01L29/7881

    摘要： A method of fabricating a flash memory device is disclosed which includes sequentially stacking a tunnel oxide film, a first conductive film, a dielectric film, a second conductive film and a metal silicide film on a semiconductor substrate, and patterning the metal silicide film, the second conductive film, the dielectric film, the first conductive film and the tunnel oxide film to form a stack gate electrode, performing a radical oxidization process on the entire resulting surface having the stack gate electrode, whereby the profile of the stack gate electrode before the radical oxidization process is performed is maintained while forming a sidewall oxide film on sidewalls of the stack gate electrode, and performing a thermal treatment process of a hydrogen atmosphere on the entire resulting surface on which the radical oxidization process is performed.

    摘要翻译： 公开了一种制造闪速存储器件的方法，其包括在半导体衬底上依次层叠隧道氧化物膜，第一导电膜，电介质膜，第二导电膜和金属硅化物膜，并且对金属硅化物膜进行图案化， 第二导电膜，电介质膜，第一导电膜和隧道氧化物膜，以形成堆叠栅电极，对具有堆叠栅电极的整个所得表面进行自由基氧化处理，由此在堆叠栅电极之前的堆叠栅电极的轮廓 在堆叠栅电极的侧壁上形成侧壁氧化膜的同时，进行自由基氧化处理，对进行自由基氧化处理的整个生成面进行氢气氛的热处理。

    Refrigerator
    22.
    发明申请
    Refrigerator 有权
    冰箱

    公开(公告)号：US20060196214A1

    公开(公告)日：2006-09-07

    申请号：US11364186

    申请日：2006-03-01

    申请人： Seung Lee ,  Sam Park

    发明人： Seung Lee ,  Sam Park

    IPC分类号： F25C1/00 ,  F25C5/18

    CPC分类号： F25D17/065 ,  F25C5/22 ,  F25C2600/04 ,  F25D2317/062 ,  F25D2400/36 ,  F25D2400/40

    摘要： A refrigerator has a freezing chamber at the bottom, and a refrigerating chamber over the freezing chamber. The refrigerator includes an ice making unit and an ice dispenser mounted in a refrigerating chamber door that allows ice to be dispensed without opening the door. A sub-PCB is mounted in the refrigerating chamber door for controlling operations of the ice making unit and the dispenser. A cold air supply duct supplies cold air from a cold air supply unit to the ice making unit.

    摘要翻译： 冰箱底部有冷冻室，冷冻室上方有一个冷藏室。 冰箱包括制冰单元和安装在冷藏室门中的冰分配器，其允许在不打开门的情况下分配冰。 子PCB被安装在冷藏室门中，用于控制制冰单元和分配器的操作。 冷空气供应管道将冷空气供应单元提供给制冰单元。

    Resin composition for embedded capacitors having excellent adhesive strength, heat resistance and flame retardancy
    23.
    发明申请
    Resin composition for embedded capacitors having excellent adhesive strength, heat resistance and flame retardancy 审中-公开
    具有优异的粘合强度，耐热性和阻燃性的嵌入式电容器用树脂组合物

    公开(公告)号：US20060183872A1

    公开(公告)日：2006-08-17

    申请号：US11352238

    申请日：2006-02-13

    申请人： Seung Lee ,  Yul Chung ,  Hyo Shin ,  Seung Sohn

    发明人： Seung Lee ,  Yul Chung ,  Hyo Shin ,  Seung Sohn

    IPC分类号： C08L63/00 ,  C08L75/04 ,  B32B27/38

    CPC分类号： C08L63/00 ,  C08J5/10 ,  C08J2363/00 ,  H01G4/206 ,  H05K1/162 ,  H05K2201/0209 ,  Y10T428/31511 ,  C08L2666/04 ,  C08L2666/24

    摘要： Disclosed herein is a resin composition for embedded capacitors having excellent adhesive strength, heat resistance and flame retardancy, a ceramic/polymer composite for embedded capacitors including the resin composition, a dielectric layer of a capacitor manufactured therefrom, and a printed circuit board. The resin composition for dielectric layers of embedded capacitors includes a resin selected from the group consisting of bisphenol-A epoxy resins, bisphenol-F epoxy resins and combinations thereof, a brominated epoxy resin containing 40 wt % or more bromine, and a resin selected from the group consisting of bisphenol-A novolac epoxy resins, multi-functional epoxy resins, polyimides, cyanate esters and combinations thereof, and exhibits excellent peel strength, Tg and/or flame retardancy. Further, a ceramic/polymer composite formed by adding a ceramic filler to the resin composition is provided. Furthermore, a dielectric layer formed of the ceramic/polymer composite and a printed circuit board including the dielectric layer are provided. According to the current invention, the ceramic/polymer composite for embedded capacitors, which realizes all of peel strength, Tg and flame retardancy, can be obtained.

    摘要翻译： 本发明公开了一种嵌入式电容器的树脂组合物，其具有优异的粘合强度，耐热性和阻燃性，用于包括树脂组合物的嵌入式电容器的陶瓷/聚合物复合物，由其制造的电容器的电介质层和印刷电路板。 嵌入式电容器的电介质层用树脂组合物包括选自双酚A型环氧树脂，双酚F型环氧树脂及其组合的树脂，含有40重量％以上的溴的溴化环氧树脂，以及选自 由双酚A酚醛清漆环氧树脂，多官能环氧树脂，聚酰亚胺，氰酸酯及其组合组成的组，具有优异的剥离强度，Tg和/或阻燃性。 另外，提供了通过在树脂组合物中添加陶瓷填料而形成的陶瓷/聚合物复合体。 此外，提供由陶瓷/聚合物复合材料形成的电介质层和包括电介质层的印刷电路板。 根据本发明，可以获得实现全部剥离强度，Tg和阻燃性的嵌入式电容器用陶瓷/聚合物复合体。

    Water-soluble composition for coating photoresist pattern and method for forming fine patterns using the same
    24.
    发明申请
    Water-soluble composition for coating photoresist pattern and method for forming fine patterns using the same 审中-公开
    用于涂覆光致抗蚀剂图案的水溶性组合物和使用其形成精细图案的方法

    公开(公告)号：US20060147834A1

    公开(公告)日：2006-07-06

    申请号：US11121769

    申请日：2005-05-04

    申请人： Geun Lee ,  Seung Moon ,  Seung Lee

    发明人： Geun Lee ,  Seung Moon ,  Seung Lee

    IPC分类号： G03F7/004

    CPC分类号： G03F7/038 ,  C09D139/06 ,  G03F7/40 ,  H01L21/312

    摘要： A composition for coating a photoresist pattern which comprises water and a compound of Formula 1 is coated on a previously formed photoresist pattern, thereby reducing a size of a space or contact hole of photoresist pattern effectively. The method using the composition is applied to all semiconductor processes for forming a fine photoresist pattern. wherein R1 and R2 are individually selected from the group consisting of H, linear or branched C1-C20 alkyl, linear or branched C2-C20 alkyl containing an ester linkage, linear or branched C2-C20 alkyl containing a ketone linkage, linear or branched C2-C20 alkyl containing a carboxylic acid group, linear or branched C7-C20 alkyl phenyl and linear or branched C3-C20 alkyl containing a acetal linkage; m is an integer ranging from 0 to 3000; and n is an integer ranging from 10 to 3000.

    摘要翻译： 将包含水和式1化合物的光致抗蚀剂图案的组合物涂覆在预先形成的光致抗蚀剂图案上，从而有效地减小光致抗蚀剂图案的空间或接触孔的尺寸。 使用该组合物的方法适用于形成精细光致抗蚀剂图案的所有半导体工艺。 其中R 1和R 2分别选自H，直链或支链C 1 -C 20烷基， 直链或支链C 2 -C 20烷基，含有酯键的直链或支链C 2 -C 20烷基，直链或支链C 2 -C 20 含有酮键的烷基，含有羧酸基的直链或支链C 2 -C 20烷基，直链或支链C 7 C 20 -C 20烷基苯基和含有缩醛键的直链或支链C 3 -C 20烷基; m为0〜3000的整数; n为10〜3000的整数。

    Door for microwave oven
    27.
    发明申请
    Door for microwave oven 有权

    公开(公告)号：US20060049191A1

    公开(公告)日：2006-03-09

    申请号：US11200046

    申请日：2005-08-10

    申请人： Seung Lee

    发明人： Seung Lee

    IPC分类号： H05B6/76

    CPC分类号： H05B6/6435 ,  H05B6/6414

    摘要： A microwave oven includes a door. The door includes a door unit for selectively opening/closing a cooking chamber and a control unit, for controlling an operation of the microwave oven, is arranged at a predetermined part of the door unit.

    Method of manufacturing flash memory device
    28.
    发明申请
    Method of manufacturing flash memory device 失效
    制造闪存设备的方法

    公开(公告)号：US20050277251A1

    公开(公告)日：2005-12-15

    申请号：US10887260

    申请日：2004-07-08

    申请人： Seung Lee ,  Sang Park ,  Pil Song

    发明人： Seung Lee ,  Sang Park ,  Pil Song

    IPC分类号： H01L27/115 ,  H01L21/331 ,  H01L21/8239 ,  H01L21/8247

    CPC分类号： H01L27/11539 ,  H01L27/11526 ,  H01L27/11536 ,  H01L27/11541 ,  H01L27/11543

    摘要： Provided relates to a method of a flash memory device, which performs a first rapid thermal oxidation process at a H2 rich atmosphere for recovering an etched damage during a gate forming process, and performs a second rapid thermal oxidation process at the H2 rich atmosphere for ion-activating after performing an ion implantation process for forming a cell transistor junction and a peripheral circuit transistor junction. As a result of those processes, a Si-dangling bond cut off during a gate etching process has a Si—H combination structure and the whole processing time is reduced, and thus an abnormal oxidation caused at an edge of an ONO layer and a tunnel oxide film, which can make it possible to prevent a smiling phenomena of the ONO layer and a bird's beak phenomena of the tunnel oxide film.

    摘要翻译： 本发明涉及一种闪存器件的方法，其在H 2富含气氛下进行第一快速热氧化处理，以在栅极形成工艺期间回收蚀刻损伤，并执行第二快速热氧化 在进行用于形成单元晶体管结的离子注入工艺和外围电路晶体管结的离子激活之后，在富H 2气氛下进行离子激活。 作为这些工艺的结果，在栅极蚀刻工艺期间切断的Si-悬挂键具有Si-H组合结构，并且整个处理时间减少，因此在ONO层和隧道的边缘处引起异常氧化 氧化膜，能够防止ONO层的微笑现象和隧道状氧化膜的鸟喙现象。

    Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same
    29.
    发明申请
    Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same 审中-公开
    包括铁电半导体图案的非易失性半导体存储器件以及用于将数据写入数据并从其读取数据的方法

    公开(公告)号：US20050254310A1

    公开(公告)日：2005-11-17

    申请号：US11120499

    申请日：2005-05-03

    申请人： Jae Lee ,  De Fu ,  Tae Kang ,  Seung Lee ,  Yoo Heo ,  Dae Kim ,  Ju Lee ,  Dong Lee

    发明人： Jae Lee ,  De Fu ,  Tae Kang ,  Seung Lee ,  Yoo Heo ,  Dae Kim ,  Ju Lee ,  Dong Lee

    IPC分类号： H01L27/105 ,  G11C5/00 ,  G11C11/22

    CPC分类号： G11C11/22

    摘要： Provided are a nonvolatile semiconductor memory device including ferroelectric semiconductor patterns in respective memory cells and methods of writing and reading data. The device includes a substrate; a plurality of first conductive lines disposed in or on the substrate; a plurality of second conductive lines disposed in or on the substrate and having a different height from the first conductive lines, wherein the second conductive lines intersect the first conductive lines, respectively, to define a plurality of intersection regions; and a plurality of memory cells disposed on the substrate. Herein, the memory cells include ferroelectric semiconductor patterns, respectively, which are disposed between the first conductive lines and the second conductive lines that define the intersection regions.

    摘要翻译： 提供了在各个存储单元中包括铁电半导体图案的非易失性半导体存储器件以及写入和读取数据的方法。 该装置包括基板; 设置在所述基板中或所述基板上的多个第一导线; 多个第二导电线设置在基板中或基板上，并且具有与第一导线不同的高度，其中第二导线分别与第一导线相交以限定多个交叉区域; 以及设置在基板上的多个存储单元。 这里，存储单元包括分别设置在限定交叉区域的第一导线和第二导线之间的铁电半导体图案。