公开(公告)号：US20180226325A1

公开(公告)日：2018-08-09

申请号：US15949541

申请日：2018-04-10

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Wing Shenq Wong

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49513 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29011 ,  H01L2224/29076 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83007 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/83815 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/014

Abstract: A single chip integrated circuit (IC) package includes a die pad, and a spacer ring on the die pad defining a solder receiving area. A solder body is on the die pad within the solder receiving area. An IC die is on the spacer ring and is secured to the die pad by the solder body within the solder receiving area. Encapsulating material surrounds the die pad, spacer ring, and IC die. For a multi-chip IC package, a dam structure is on the die pad and defines multiple solder receiving areas. A respective solder body is on the die pad within a respective solder receiving area. An IC die is within each respective solder receiving area and is held in place by a corresponding solder body. Encapsulating material surrounds the die pad, dam structure, and plurality of IC die.

公开(公告)号：US09972557B2

公开(公告)日：2018-05-15

申请号：US14567070

申请日：2014-12-11

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Wing Shenq Wong

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49513 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29011 ,  H01L2224/29076 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83007 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/83815 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/014

Abstract: A single chip integrated circuit (IC) package includes a die pad, and a spacer ring on the die pad defining a solder receiving area. A solder body is on the die pad within the solder receiving area. An IC die is on the spacer ring and is secured to the die pad by the solder body within the solder receiving area. Encapsulating material surrounds the die pad, spacer ring, and IC die. For a multi-chip IC package, a dam structure is on the die pad and defines multiple solder receiving areas. A respective solder body is on the die pad within a respective solder receiving area. An IC die is within each respective solder receiving area and is held in place by a corresponding solder body. Encapsulating material surrounds the die pad, dam structure, and plurality of IC die.

公开(公告)号：US09418920B2

公开(公告)日：2016-08-16

申请号：US14589094

申请日：2015-01-05

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Wing Shenq Wong

IPC: H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/29 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/49568 ,  H01L21/4825 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/32245 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/838 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/17738 ,  H01L2924/17763 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit (IC) package includes a die pad and an IC die secured on the die pad. The IC die had outer edges aligned with outer edges of the die pad. An encapsulating material body surrounds the die pad and IC die. Leads extend outwardly from the encapsulating material body and are coupled to the IC die. Each lead has an upper surface coplanar with an upper surface of the IC die. The die pad has a lower surface exposed through the encapsulating material body, and has a thickness greater than a thickness of each of the plurality of leads.

Abstract translation: 集成电路（IC）封装包括芯片焊盘和固定在裸片焊盘上的IC芯片。 IC芯片具有与芯片焊盘的外边缘对准的外边缘。 封装材料体围绕芯片焊盘和IC芯片。 引线从封装材料体向外延伸并耦合到IC管芯。 每个引线具有与IC芯片的上表面共面的上表面。 管芯焊盘具有通过封装材料体暴露的下表面，并且其厚度大于多个引线中的每一个的厚度。

公开(公告)号：US20150332995A1

公开(公告)日：2015-11-19

申请号：US14278458

申请日：2014-05-15

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Kim-Yong GOH ,  Wing Shenq Wong

IPC: H01L23/498 ,  H01L23/31 ,  H05K1/18

CPC classification number: H05K3/3426 ,  H01L23/13 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49555 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/1815 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/10757 ,  Y02P70/613 ,  Y10T29/49147 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic device may include a surface mount integrated circuit (IC) package to be attached to a printed circuit board (PCB). The surface mount IC package may include at least one IC and an encapsulating material surrounding the at least one IC and having a component receiving cavity defined therein on a bottom surface thereof to be positioned adjacent the PCB. The surface mount IC package may also include electrical leads coupled to the at least one IC and extending outwardly from the encapsulating material to be coupled to the PCB. The electronic device may also include at least one electronic component carried within the component receiving cavity and that includes electrical contacts to be coupled to the PCB.

Abstract translation: 电子设备可以包括要附着到印刷电路板（PCB）的表面贴装集成电路（IC）封装。 表面安装IC封装可以包括至少一个IC和围绕至少一个IC的封装材料，并且在其底表面上具有限定在其中的部件容纳腔，以邻近PCB定位。 表面贴装IC封装还可以包括耦合到至少一个IC并从封装材料向外延伸以耦合到PCB的电引线。 电子设备还可以包括在部件接收腔内承载的至少一个电子部件，并且包括要联接到PCB的电触点。

公开(公告)号：US20150137148A1

公开(公告)日：2015-05-21

申请号：US14083102

申请日：2013-11-18

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wing Shenq Wong

IPC: H01L25/16

CPC classification number: H01L25/167 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/16151 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: One or more embodiments are directed to system in package (SiP) for optical devices, including proximity sensor packaging. One embodiment is directed to an optical package that includes a stacked arrangement with a plurality of optical devices arranged over an image sensor processor die that is coupled to a first substrate. Between the two optical devices and the image sensor processor die there is provided at least a second substrate. In one embodiment, the optical package is a proximity sensor package and the optical devices include a light-emitting diode die and a light-receiving diode die. In one embodiment, the light-emitting diode die is secured to a surface of the second substrate and the light-receiving diode die is secured to a surface of a third substrate. The second and the third substrate may be secured to a surface of the image sensor processor die or to a surface of encapsulation material.

Abstract translation: 一个或多个实施例涉及用于光学装置的包装系统（SiP），包括接近传感器封装。 一个实施例涉及一种光学封装，其包括具有布置在耦合到第一衬底的图像传感器处理器裸片上的多个光学器件的堆叠布置。 在两个光学器件和图像传感器处理器管芯之间提供至少第二衬底。 在一个实施例中，光学封装是接近传感器封装，并且光学器件包括发光二极管管芯和光接收二极管管芯。 在一个实施例中，发光二极管管芯固定到第二衬底的表面，并且光接收二极管管芯固定到第三衬底的表面。 第二和第三基板可以固定到图像传感器处理器管芯的表面或者封装材料的表面。

公开(公告)号：US09018753B2

公开(公告)日：2015-04-28

申请号：US13958146

申请日：2013-08-02

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wing Shenq Wong

IPC: H01L23/12 ,  H01L23/22 ,  H01L23/24 ,  H01L23/04 ,  H01L21/82 ,  H01L23/00 ,  H01L21/10

CPC classification number: H01L23/04 ,  H01L21/10 ,  H01L21/82 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14625 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85005 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/16788 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A method is described for making electronic modules includes molding onto a substrate panel a matrix panel defining a plurality of cavities, attaching semiconductor die to the substrate panel in respective cavities of the molded matrix panel, electrically connecting the semiconductor die to the substrate panel, affixing a cover to the molded matrix panel to form an electronic module assembly, mounting the electronic module assembly on a carrier tape, and separating the electronic module assembly into individual electronic modules. An electronic module is described which includes a substrate, a wall member molded onto the substrate, the molded wall member defining a cavity, at least one semiconductor die attached to the substrate in the cavity and electrically connected to the substrate, and a cover affixed to the molded wall member over the cavity.

Abstract translation: 描述了一种用于制造电子模块的方法，包括将限定多个空腔的矩阵面板模制到基板上，将半导体管芯附着到模制矩阵面板的相应空腔中的基板面板，将半导体管芯电连接到基板面板， 模制矩阵面板的盖子以形成电子模块组件，将电子模块组件安装在载带上，以及将电子模块组件分离成各个电子模块。 描述了一种电子模块，其包括衬底，模制在衬底上的壁构件，限定空腔的模制壁构件，至少一个连接到空腔中的衬底并电连接到衬底的半导体管芯，以及固定到 模制的壁构件在空腔上。