公开(公告)号：US20220173060A1

公开(公告)日：2022-06-02

申请号：US17470644

申请日：2021-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Ahn ,  Jiwon Kim ,  Sungmin Hwang ,  Joonsung Lim ,  Sukkang Sung

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: A nonvolatile memory device and a data storage system including the same are provided. The nonvolatile memory device includes: a first structure including at least one first memory plane; and a second structure bonded to the first structure and including at least one second memory plane, wherein the number of the at least one first memory plane included in the first structure is different from the number of the at least one second memory plane included in the second structure.

公开(公告)号：US20220157838A1

公开(公告)日：2022-05-19

申请号：US17467568

申请日：2021-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Ahn ,  Jiwon Kim ,  Sungmin Hwang ,  Joonsung Lim ,  Sukkang Sung

IPC: H01L27/11524 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device and a data storage system including the same, the semiconductor device including: a first structure including a peripheral circuit; and a second structure, including: a pattern structure; an upper insulating layer; a stack structure between the first structure and the pattern structure and including first and second stack portions spaced apart from each other, the first and second stack portions respectively including horizontal conductive layers and interlayer insulating layers alternately stacked; separation structures penetrating through the stack structure; memory vertical structures penetrating through the first stack portion; and a contact structure penetrating through the second stack portion, the pattern structure, and the upper insulating layer, wherein the contact structure includes a lower contact plug penetrating through at least the second stack portion and an upper contact plug contacting the lower contact plug and extending upwardly to penetrate through the pattern structure and the upper insulating layer.

公开(公告)号：US11177666B2

公开(公告)日：2021-11-16

申请号：US16444409

申请日：2019-06-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keumsu Song ,  Kwangseob Kim ,  Kihyun Kim ,  Dongzo Kim ,  Jiwon Kim ,  Jihye Kim ,  Yunjeong Noh ,  Changhak O ,  Hyungkoo Chung ,  Mincheol Ha ,  Jongchul Hong ,  Yongsang Yun

IPC: H01F17/00 ,  H01F38/14 ,  H02J5/00 ,  H02J50/12 ,  H02J50/40 ,  H02J50/70 ,  H02J7/02 ,  H04B5/00

Abstract: An electronic device is provided. The electronic device includes a coil unit, a power transmission circuit electrically connected to the coil unit, and a control circuit configured to wirelessly transmit power using the coil unit, and the coil unit may include a first coil. The first coil may include a first layer wound in a first shape by a first number of turns, and a second layer extending from the first layer and wound in a second shape by a second number of turns, and the second layer may be disposed above the first layer to overlap the first layer.

公开(公告)号：US10673285B2

公开(公告)日：2020-06-02

申请号：US16283182

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mincheol Ha ,  Changhak O ,  Kwangseob Kim ,  Dongzo Kim ,  Jiwon Kim ,  Jongchul Hong ,  Kihyun Kim ,  Yunjeong Noh ,  Jaewan Park ,  Hyungkoo Chung ,  Jihye Kim ,  Keumsu Song ,  Yongsang Yun ,  Sangmoo Hwangbo

IPC: H02J50/60 ,  H02J50/80 ,  H02J50/12 ,  H02J7/02 ,  H02J7/00

Abstract: Various embodiments related to electronic devices are set forth herein. According to an embodiment, an electronic device comprises a coil, a power transmitting circuit electrically connected with the coil, a sensing circuit, and a control circuit. The control circuit is configured to wirelessly output, using the power transmitting circuit, a first designated power through the coil to an external electronic device, and identify, using the sensing circuit, first energy detected at the coil due to a foreign object of the electronic device. The control circuit is further configured to, when a magnitude of the energy falls within a first designated range, output, using the power transmitting circuit, a second designated power to the external electronic device, and when the magnitude of the energy falls within a second designated range, abstain from outputting the power to the external electronic device using the power transmitting circuit. Other embodiments are possible as well.

公开(公告)号：US10607060B2

公开(公告)日：2020-03-31

申请号：US15821269

申请日：2017-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chaekyung Lee ,  Jiwon Kim ,  Won Lee ,  Bo-Keun Kim ,  Inkyeong Shin

IPC: G06K9/00 ,  G06K9/20 ,  G06F21/32

Abstract: An apparatus and method for setting a fingerprint recognition region in an electronic device are provided. An electronic device includes a display, a finger scan sensor overlapped with at least a partial region of the display, and a processor. The processor controls to detect a touch input for at least one object displayed at the display, when detecting a first fingerprint image through a fingerprint recognition region corresponding to the touch input, enlarge a size of the fingerprint recognition region, detect a second fingerprint image through the enlarged fingerprint recognition region, and when having succeeded in user authentication by using the second fingerprint image, perform a function corresponding to the at least one object.

公开(公告)号：US20250124984A1

公开(公告)日：2025-04-17

申请号：US19002360

申请日：2024-12-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeho Ahn ,  Jiwon Kim ,  Sungmin Hwang ,  Joonsung Lim ,  Sukkang Sung

IPC: G11C16/10 ,  G11C16/26 ,  H01L23/48 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

Abstract: A semiconductor memory device includes: a semiconductor substrate having a first surface and a second surface opposing each other; a back-side insulating layer below the second surface of the semiconductor substrate; an external input/output conductive pattern below the back-side insulating layer; a circuit device including a gate electrode and a source/drain region, on the first surface of the semiconductor substrate; an internal input/output conductive pattern on the first surface of the semiconductor substrate, the internal input/output conductive pattern having at least a portion disposed on the same level as at least a portion of the gate electrode; a through-electrode structure penetrating through the semiconductor substrate and the back-side insulating layer and electrically connected to the internal input/output conductive pattern and the external input/output conductive pattern; and a memory cell array region disposed on a level higher than the circuit device, on the first surface of the semiconductor substrate.

公开(公告)号：US12058392B2

公开(公告)日：2024-08-06

申请号：US17603134

申请日：2021-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Boyoung Lee ,  Koanmo Kim ,  Eunji Kim ,  Jiwon Kim ,  Jaehong Lee

IPC: H04N21/2343 ,  H04N21/218 ,  H04N21/81

CPC classification number: H04N21/234345 ,  H04N21/21805 ,  H04N21/816

Abstract: A method of transmitting video content by using an edge computing service (e.g., a multi-access edge computing (MEC) service) is provided. The method includes obtaining sensor information including orientation information and pupil position information from an electronic device connected to the edge data network, obtaining a first partial image including a user field-of-view image and an extra field-of-view image, the user field-of-view image corresponding to the orientation information, and the extra field-of-view image corresponding to the pupil position information, generating a first frame by encoding the first partial image, and transmitting the generated first frame to the electronic device.

公开(公告)号：US12057421B2

公开(公告)日：2024-08-06

申请号：US17470644

申请日：2021-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Ahn ,  Jiwon Kim ,  Sungmin Hwang ,  Joonsung Lim ,  Sukkang Sung

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/18

CPC classification number: H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A nonvolatile memory device and a data storage system including the same are provided. The nonvolatile memory device includes: a first structure including at least one first memory plane; and a second structure bonded to the first structure and including at least one second memory plane, wherein the number of the at least one first memory plane included in the first structure is different from the number of the at least one second memory plane included in the second structure.

公开(公告)号：US12009325B2

公开(公告)日：2024-06-11

申请号：US17328176

申请日：2021-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Min Hwang ,  Jiwon Kim ,  Jaeho Ahn ,  Joon-Sung Lim ,  Sukkang Sung

IPC: H01L23/00 ,  G11C16/08 ,  G11C16/10 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27 ,  H10B43/40

CPC classification number: H01L24/08 ,  G11C16/08 ,  G11C16/10 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27 ,  H10B43/40 ,  H01L2224/08135 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor device and electronic system, the device including a cell structure stacked on a peripheral circuit structure, wherein the cell structure includes a first interlayer dielectric layer and first metal pads exposed at the first interlayer dielectric layer and connected to gate electrode layers and channel regions, the peripheral circuit structure includes a second interlayer dielectric layer and second metal pads exposed at the second interlayer dielectric layer and connected to a transistor, the first metal pads include adjacent first and second sub-pads, the second metal pads include adjacent third and fourth sub-pads, the first and third sub-pads are coupled, and a width of the first sub-pad is greater than that of the third sub-pad, and the second sub-pad and the fourth sub-pad are coupled, and a width of the fourth sub-pad is greater than that of the second sub-pad.

公开(公告)号：US11967574B2

公开(公告)日：2024-04-23

申请号：US17460873

申请日：2021-08-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungmin Hwang ,  Jiwon Kim ,  Jaeho Ahn ,  Joonsung Lim ,  Sukkang Sung

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L25/18

CPC classification number: H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A memory device including a first structure; and a second structure on the first structure, wherein the first structure includes a first substrate; a peripheral circuit on the first substrate; a first insulating layer covering the first substrate and the peripheral circuit; and a first bonding pad on the first insulating layer, the second structure includes a second substrate; a memory cell array on a first surface of the second substrate; a second insulating layer covering the first surface of the second substrate and the memory cell array; a conductive pattern at least partially recessed from a second surface of the second substrate; and a second bonding pad on the second insulating layer, the first bonding pad is in contact with the second bonding pad, and the conductive pattern is spaced apart from the second insulating layer.