公开(公告)号：US09922994B2

公开(公告)日：2018-03-20

申请号：US15332006

申请日：2016-10-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Ryota Hodo ,  Motomu Kurata ,  Shinya Sasagawa ,  Satoru Okamoto ,  Shunpei Yamazaki

IPC: H01L27/12 ,  H01L29/66 ,  H01L21/02 ,  H01L21/467 ,  H01L21/463 ,  H01L21/768 ,  H01L29/786 ,  H01L23/535 ,  H01L23/522 ,  H01L29/778 ,  H01L23/532

CPC classification number: H01L27/1225 ,  H01L21/02565 ,  H01L21/463 ,  H01L21/467 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/78603 ,  H01L29/7869

Abstract: First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.

公开(公告)号：US09454028B2

公开(公告)日：2016-09-27

申请号：US14047168

申请日：2013-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoru Okamoto ,  Shunpei Yamazaki

IPC: G02F1/1362 ,  G02F1/1333 ,  G06F1/16 ,  G06F3/14 ,  G09G3/20 ,  H01L27/32 ,  H04M1/02 ,  H04M1/725

CPC classification number: G06F1/1616 ,  G02F1/13338 ,  G02F2203/02 ,  G06F1/1626 ,  G06F1/1637 ,  G06F1/1643 ,  G06F1/1647 ,  G06F1/1684 ,  G06F1/1686 ,  G06F3/0412 ,  G06F3/14 ,  G09G3/20 ,  G09G5/22 ,  G09G2300/0842 ,  G09G2340/0407 ,  H01L27/323 ,  H01L27/3234 ,  H01L27/3244 ,  H04M1/0214 ,  H04M1/0247 ,  H04M1/72519 ,  H04M2250/16 ,  H04M2250/22

Abstract: When image data is displayed on the display portion of a conventional mobile telephone, characters cannot be displayed thereon, and thus the image data and the characters cannot be simultaneously displayed. In a portable electronic device according to the present invention, a cover member having a first display device (101) for displaying an image (digital still image or the like) and a second display device (102) having a touch input operational portion (for displaying characters, symbols, or the like) are attached to each other so as to allow opening and closing.

公开(公告)号：US08921902B2

公开(公告)日：2014-12-30

申请号：US13851122

申请日：2013-03-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoru Okamoto

IPC: H01L27/148 ,  H01L27/12 ,  H01L29/66 ,  H01L29/49 ,  H01L29/786 ,  G02F1/1368 ,  H01L27/13

CPC classification number: H01L29/786 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/13 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78696

Abstract: An object is to provide a semiconductor device with improved reliability in which a defect stemming from an end portion of a semiconductor layer provided in an island shape is prevented, and a manufacturing method thereof. Over a substrate having an insulating surface, an island-shaped semiconductor layer is formed, a first alteration treatment is performed, a first insulating film is formed on a surface of the island-shaped semiconductor layer, the first insulating film is removed, a second alteration treatment is performed on the island-shaped semiconductor from which the first insulating film is removed, a second insulating film is formed on a surface of the island-shaped semiconductor layer, and a conductive layer is formed over the second insulating film. An upper end portion of the island-shaped semiconductor layer has curvature by the first alteration treatment and the second alteration treatment.

Abstract translation: 本发明的目的是提供一种具有改善的可靠性的半导体器件及其制造方法，其中，所述半导体器件具有防止由形成为岛状的半导体层的端部产生的缺陷。 在具有绝缘表面的衬底上形成岛状半导体层，进行第一改变处理，在岛状半导体层的表面上形成第一绝缘膜，除去第一绝缘膜，将第二绝缘膜除去 在去除了第一绝缘膜的岛状半导体上进行改变处理，在岛状半导体层的表面上形成第二绝缘膜，并且在第二绝缘膜上形成导电层。 岛状半导体层的上端部通过第一变更处理和第二变更处理而具有曲率。

公开(公告)号：US12250819B2

公开(公告)日：2025-03-11

申请号：US17623301

申请日：2020-06-23

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Tatsuya Onuki ,  Satoru Okamoto

IPC: H10B43/27

Abstract: A semiconductor device having a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening; a first conductor including a second opening over the first insulator; a second insulator including a third opening over the first conductor; a third insulator provided along a first side surface of the first opening, a second side surface of the second opening, and a third side surface of the third opening; an oxide provided along the first side surface, the second side surface, and the third side surface with the third insulator therebetween; a second conductor provided at the first side surface with the third insulator and the oxide therebetween; and a third conductor provided at the third side surface with the third insulator and the oxide therebetween, the oxide includes a first region in the first opening, a second region in the second opening, and a third region in the third opening, and the second region has higher resistance than the first region and the third region.

公开(公告)号：US12159937B2

公开(公告)日：2024-12-03

申请号：US17428825

申请日：2020-02-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuichi Yanagisawa ,  Ryota Hodo ,  Satoru Okamoto

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a first insulator, a first oxide over the first insulator, a second insulator provided between the first insulator and the first oxide, a second oxide in contact with the first insulator and in contact with a side surface of the first oxide, and a third insulator over the first insulator, the second oxide, and the first oxide. The third insulator includes a region in contact with a top surface of the first oxide. The second insulator and the third insulator include a material which is less likely to pass oxygen than the second oxide.

公开(公告)号：US11997846B2

公开(公告)日：2024-05-28

申请号：US17256349

申请日：2019-06-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoru Okamoto ,  Ryo Tokumaru ,  Ryota Hodo

IPC: H10B12/00 ,  G11C11/402 ,  H01L29/786

CPC classification number: H10B12/30 ,  G11C11/4023 ,  H01L29/7869

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes an oxide; a first conductor and a second conductor provided apart from each other over the oxide; a third conductor including a region that is over the oxide and overlaps with a region between the first conductor and the second conductor; a first insulator over the third conductor; a fourth conductor that is electrically connected to the first conductor through a first opening provided in the first insulator; a second insulator that is provided over the first insulator and that is provided over the fourth conductor in the first opening; a fifth conductor overlapping with the fourth conductor with the second insulator positioned therebetween in the first opening; and a sixth conductor electrically connected to the second conductor in a second opening provided in the first insulator and the second insulator. The fifth conductor and the sixth conductor are in contact with a top surface of the second insulator over the first insulator.

公开(公告)号：US11922690B2

公开(公告)日：2024-03-05

申请号：US17619623

申请日：2020-06-12

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takuro Kanemura ,  Taisuke Higashi ,  Hiroya Hibino ,  Atsuya Tokinosu ,  Hiromichi Godo ,  Satoru Okamoto

IPC: G06V20/20 ,  G06F1/16 ,  G06V10/82 ,  G06V20/68 ,  G09B5/02 ,  G09B19/00

CPC classification number: G06V20/20 ,  G06F1/163 ,  G06V20/68 ,  G09B5/02 ,  G06V10/82 ,  G09B19/003

Abstract: A data processing system, a data processing device, and a data processing method are provided. The data processing system includes a wearable device including a display means and an imaging means and a database that is connected to the wearable device through a network. The database includes at least one of pieces of information on a cooking recipe, a cooking method, and a material. The wearable device detects a first material by the imaging means. The wearable device collects information on the first material from the database. When the first material exists in a specific region in an imaging range of the imaging means, the information on the first material is displayed on the display means. When the first material does not exist in the specific region, the information on the first material is not displayed on the display means.

公开(公告)号：US11245039B2

公开(公告)日：2022-02-08

申请号：US16378622

申请日：2019-04-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshinobu Asami ,  Yutaka Okazaki ,  Satoru Okamoto ,  Shinya Sasagawa

IPC: H01L29/786 ,  H01L29/06 ,  H01L21/02 ,  H01L29/423 ,  H01L21/475 ,  H01L29/66 ,  H01L21/4757 ,  H01L21/67 ,  C23C16/40 ,  C23C16/455 ,  H01L27/12

Abstract: A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.

公开(公告)号：US11101293B2

公开(公告)日：2021-08-24

申请号：US15931660

申请日：2020-05-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Ryota Hodo ,  Motomu Kurata ,  Shinya Sasagawa ,  Satoru Okamoto ,  Shunpei Yamazaki

IPC: H01L23/532 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L21/467 ,  H01L21/463 ,  H01L21/768 ,  H01L21/02 ,  H01L23/522 ,  H01L29/778

Abstract: First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.

公开(公告)号：US10460984B2

公开(公告)日：2019-10-29

申请号：US15092973

申请日：2016-04-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Shinya Sasagawa ,  Ryota Hodo ,  Yuta Iida ,  Satoru Okamoto

IPC: H01L21/76 ,  H01L21/768

Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.