公开(公告)号：US20160322503A1

公开(公告)日：2016-11-03

申请号：US15131298

申请日：2016-04-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki TEZUKA ,  Tetsuhiro TANAKA ,  Toshiya ENDO ,  Mitsuhiro ICHIJO

IPC: H01L29/786 ,  H01L29/792 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/10805 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7855 ,  H01L29/78603 ,  H01L29/78648

Abstract: A semiconductor device includes a semiconductor, a first conductor, a second conductor, a third conductor, a fourth conductor, a first insulator, a second insulator, a third insulator, and a fourth insulator. The first conductor and the semiconductor partly overlap with each other with the first insulator positioned therebetween. The second conductor and the third conductor have regions in contact with the semiconductor. The semiconductor has a region in contact with the second insulator. The fourth insulator has a first region and a second region. The first region is thicker than the second region. The first region has a region in contact with the second insulator. The second region has a region in contact with the third insulator. The fourth conductor and the second insulator partly overlap with each other with the fourth insulator positioned therebetween.

Abstract translation: 半导体器件包括半导体，第一导体，第二导​​体，第三导体，第四导体，第一绝缘体，第二绝缘体，第三绝缘体和第四绝缘体。 第一导体和半导体部分地彼此重叠，第一绝缘体位于它们之间。 第二导体和第三导体具有与半导体接触的区域。 半导体具有与第二绝缘体接触的区域。 第四绝缘体具有第一区域和第二区域。 第一区域比第二区域厚。 第一区域具有与第二绝缘体接触的区域。 第二区域具有与第三绝缘体接触的区域。 第四导体和第二绝缘体彼此部分重叠，第四绝缘体位于它们之间。

公开(公告)号：US20160308060A1

公开(公告)日：2016-10-20

申请号：US15092956

申请日：2016-04-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Mitsuhiro ICHIJO ,  Toshiya ENDO ,  Akihisa SHIMOMURA ,  Yuji EGI ,  Sachiaki TEZUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78648

Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.

Abstract translation: 具有稳定电特性的晶体管。 半导体器件包括衬底上的第一绝缘体，第一绝缘体上的第二绝缘体，与第二绝缘体的顶表面的至少一部分接触的氧化物半导体，与第一绝缘体的至少一部分接触的第三绝缘体 所述氧化物半导体的第一导体和与所述氧化物半导体电连接的第二导体，在所述第三绝缘体上的第四绝缘体，位于所述第四绝缘体之上的第三导体，并且其中至少一部分位于所述第一导体与所述第二绝缘体之间 导体和第三导体上的第五绝缘体。 第一绝缘体包含卤素元素。

公开(公告)号：US20160254386A1

公开(公告)日：2016-09-01

申请号：US15047940

申请日：2016-02-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Akihisa SHIMOMURA ,  Ryo TOKUMARU ,  Yasumasa YAMANE ,  Yuhei SATO ,  Naoki OKUNO ,  Motoki NAKASHIMA

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/51

CPC classification number: H01L29/7869 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/0607 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66969

Abstract: Provided is a transistor with stable electrical characteristics. Provided is a semiconductor device including an oxide semiconductor over a substrate, a first conductor in contact with a top surface of the oxide semiconductor, a second conductor in contact with the top surface of the oxide semiconductor, a first insulator over the first and second conductors and in contact with the top surface of the oxide semiconductor, a second insulator over the first insulator, a third conductor over the second insulator, and a third insulator over the third conductor. The third conductor overlaps with the first conductor with the first and second insulators positioned therebetween, and overlaps with the second conductor with the first and second insulators positioned therebetween. The first insulator contains oxygen. The second insulator transmits less oxygen than the first insulator. The third insulator transmits less oxygen than the first insulator.

Abstract translation: 提供了具有稳定电特性的晶体管。 提供了一种半导体器件，其包括在衬底上的氧化物半导体，与氧化物半导体的顶表面接触的第一导体，与氧化物半导体的顶表面接触的第二导体，第一和第二导体上的第一绝缘体 并且与所述氧化物半导体的顶表面接触，在所述第一绝缘体上方的第二绝缘体，所述第二绝缘体上的第三导体以及所述第三导体上的第三绝缘体。 第三导体与第一导体重叠，其中第一和第二绝缘体位于它们之间，并且与第二导体重叠，其中第一和第二绝缘体位于它们之间。 第一绝缘体包含氧。 第二绝缘体比第一绝缘体传输更少的氧。 第三绝缘体比第一绝缘体传输更少的氧。

公开(公告)号：US20160111547A1

公开(公告)日：2016-04-21

申请号：US14883971

申请日：2015-10-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Akihisa SHIMOMURA ,  Yasumasa YAMANE ,  Naoto YAMADE ,  Tetsuhiro TANAKA

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696

Abstract: A transistor with stable electrical characteristics or a transistor with normally-off electrical characteristics. The transistor is a semiconductor device including a conductor, a semiconductor, a first insulator, and a second insulator. The semiconductor is over the first insulator. The conductor is over the semiconductor. The second insulator is between the conductor and the semiconductor. The first insulator includes fluorine and hydrogen. The fluorine concentration of the first insulator is higher than the hydrogen concentration of the first insulator.

Abstract translation: 具有稳定电特性的晶体管或具有常关电特性的晶体管。 晶体管是包括导体，半导体，第一绝缘体和第二绝缘体的半导体器件。 半导体在第一绝缘体之上。 导体在半导体上。 第二绝缘体在导体和半导体之间。 第一绝缘体包括氟和氢。 第一绝缘体的氟浓度高于第一绝缘体的氢浓度。

公开(公告)号：US20160087085A1

公开(公告)日：2016-03-24

申请号：US14854789

申请日：2015-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Sachiaki TEZUKA ,  Mitsuhiro ICHIJO ,  Noriyoshi SUZUKI

IPC: H01L29/66

CPC classification number: H01L29/66969 ,  H01L21/06 ,  H01L21/16 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a semiconductor device with improved reliability. To provide a semiconductor device with stable characteristics. To provide a transistor having a low off-state current. To provide a transistor having a high on-state current. To provide a novel semiconductor device, a novel electronic device, or the like. A method for manufacturing the semiconductor device includes the steps of forming a first semiconductor over a substrate; forming a second semiconductor over and in contact with the first semiconductor; forming a first layer over the second semiconductor; performing oxygen plasma treatment and then removing the first layer to expose at least part of a surface of the second semiconductor; forming a third semiconductor over and in contact with the second semiconductor; forming a first insulator over and in contact with the third semiconductor; and forming a first conductor over the first insulator.

Abstract translation: 提供具有改善的可靠性的半导体器件。 提供具有稳定特性的半导体器件。 提供具有低截止电流的晶体管。 提供具有高导通电流的晶体管。 提供新颖的半导体器件，新颖的电子器件等。 一种制造半导体器件的方法包括以下步骤：在衬底上形成第一半导体; 在第一半导体之上形成第二半导体，并与第一半导体接触; 在所述第二半导体上形成第一层; 执行氧等离子体处理，然后去除第一层以暴露第二半导体的表面的至少一部分; 在所述第二半导体上形成第三半导体并与其接触; 在所述第三半导体上形成第一绝缘体并与所述第三半导体接触; 以及在所述第一绝缘体上形成第一导体。

公开(公告)号：US20150340505A1

公开(公告)日：2015-11-26

申请号：US14719431

申请日：2015-05-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Masayuki SAKAKURA ,  Ryo TOKUMARU ,  Yasumasa YAMANE ,  Yuhei SATO

IPC: H01L29/786 ,  H01L21/465 ,  H01L21/477 ,  H01L29/40 ,  H01L29/66 ,  H01L21/02 ,  H01L21/441

CPC classification number: H01L29/66969 ,  H01L21/02255 ,  H01L21/02565 ,  H01L21/441 ,  H01L21/465 ,  H01L21/477 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1156 ,  H01L29/401 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a first insulating film over a first gate electrode over a substrate while heated at a temperature higher than or equal to 450° C. and lower than the strain point of the substrate, forming a first oxide semiconductor film over the first insulating film, adding oxygen to the first oxide semiconductor film and then forming a second oxide semiconductor film over the first oxide semiconductor film, and performing heat treatment so that part of oxygen contained in the first oxide semiconductor film is transferred to the second oxide semiconductor film.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：在高于或等于450℃并低于衬底的应变点的温度下加热时，在衬底上方的第一栅电极上形成第一绝缘膜，形成 在所述第一绝缘膜上方的第一氧化物半导体膜，向所述第一氧化物半导体膜添加氧，然后在所述第一氧化物半导体膜上形成第二氧化物半导体膜，进行热处理，使得所述第一氧化物半导体膜中包含的部分氧为 转移到第二氧化物半导体膜。

公开(公告)号：US20150287831A1

公开(公告)日：2015-10-08

申请号：US14677168

申请日：2015-04-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tetsuhiro TANAKA ,  Yujiro SAKURADA ,  Yutaka OKAZAKI

IPC: H01L29/786 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L29/7869 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an oxide semiconductor film, a source electrode, a drain electrode, a gate insulating film, a gate electrode, and an insulating film. The source electrode includes a region in contact with the oxide semiconductor film. The drain electrode includes a region in contact with the oxide semiconductor film. The gate insulating film is provided between the oxide semiconductor film and the gate electrode. The insulating film is provided over the gate electrode and over the gate insulating film. The insulating film includes a first portion and a second portion. The first portion includes a step portion. The second portion includes a non-step portion. The first portion includes a portion with a first thickness. The second portion includes a portion with a second thickness. The second thickness is larger than or equal to 1.0 time and smaller than or equal to 2.0 times the first thickness.

Abstract translation: 半导体器件包括氧化物半导体膜，源电极，漏电极，栅极绝缘膜，栅电极和绝缘膜。 源电极包括与氧化物半导体膜接触的区域。 漏极包括与氧化物半导体膜接触的区域。 栅极绝缘膜设置在氧化物半导体膜和栅电极之间。 绝缘膜设置在栅极上方和栅极绝缘膜上方。 绝缘膜包括第一部分和第二部分。 第一部分包括台阶部分。 第二部分包括非步骤部分。 第一部分包括具有第一厚度的部分。 第二部分包括具有第二厚度的部分。 第二厚度大于或等于1.0倍且小于或等于第一厚度的2.0倍。

公开(公告)号：US20150024577A1

公开(公告)日：2015-01-22

申请号：US14330481

申请日：2014-07-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi KATO ,  Yasuhiko TAKEMURA ,  Tetsuhiro TANAKA ,  Takayuki INOUE ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Shunpei YAMAZAKI

IPC: G11C16/04 ,  H01L27/115 ,  G11C16/20

CPC classification number: G11C16/0466 ,  G11C16/20 ,  H01L21/28282 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/11568

Abstract: A manufacturing method of a semiconductor device in which the threshold is corrected is provided. In a semiconductor device including a plurality of transistors each includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit for supplying a signal to the gate electrode and a circuit for supplying a signal to the source or drain electrode are electrically separated from each other. The process is performed in the state where the potential of the former circuit is set higher than the potential of the latter circuit.

Abstract translation: 提供了其中校正阈值的半导体器件的制造方法。 在包括多个晶体管的半导体器件中，每个包括半导体，与半导体电连接的源电极或漏电极，栅电极和栅电极与半导体之间的电荷陷阱层，电子被俘获在电荷陷阱层 通过进行热处理，同时保持栅电极的电位高于源电极或漏电极的电位1秒以上。 通过该过程，阈值增加并且Icut减小。 用于向栅电极提供信号的电路和用于向源电极或漏电极提供信号的电路彼此电分离。 该处理在前一电路的电位被设置为高于后一电路的电位的状态下执行。

公开(公告)号：US20150008428A1

公开(公告)日：2015-01-08

申请号：US14313154

申请日：2014-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshitaka YAMAMOTO ,  Tetsuhiro TANAKA ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Takayuki INOUE ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1156 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.

Abstract translation: 提供了将阈值调整为适当值的半导体器件的制造方法。 半导体器件包括半导体，与半导体电连接的源极或漏极，第一栅电极和第二栅电极，半导体夹在其间，第一栅电极和半导体之间的电子陷阱层和栅极 第二栅电极和半导体之间的绝缘层。 通过在加热的同时保持第一栅电极的电位高于源极或漏极的电位1秒以上，电子被捕获在电子阱层中。 因此，阈值增加并且Icut减小。

公开(公告)号：US20140319516A1

公开(公告)日：2014-10-30

申请号：US14258553

申请日：2014-04-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Kazuya HANAOKA

IPC: H01L29/786

CPC classification number: H01L29/78618 ,  H01L29/41733 ,  H01L29/7869

Abstract: To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device formed using an oxide semiconductor and having favorable electrical characteristics. A semiconductor device includes an island-shaped semiconductor layer over an insulating surface; a pair of electrodes in contact with a side surface of the semiconductor layer and overlapping with a part of a top surface of the semiconductor layer; an oxide layer located between the semiconductor layer and the electrode and in contact with a part of the top surface of the semiconductor layer and a part of a bottom surface of the electrode; a gate electrode overlapping with the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. In addition, the semiconductor layer includes an oxide semiconductor, and the pair of electrodes includes Al, Cr, Cu, Ta, Ti, Mo, or W.

Abstract translation: 提供适合小型化的半导体器件。 提供高度可靠的半导体器件。 提供使用氧化物半导体形成并具有良好电气特性的半导体器件。 半导体器件包括绝缘表面上的岛状半导体层; 与半导体层的侧表面接触并与半导体层的顶表面的一部分重叠的一对电极; 位于半导体层和电极之间并与半导体层的顶表面的一部分和电极的底表面的一部分接触的氧化物层; 与半导体层重叠的栅电极; 以及在半导体层和栅电极之间的栅极绝缘层。 此外，半导体层包括氧化物半导体，该对电极包括Al，Cr，Cu，Ta，Ti，Mo或W.