公开(公告)号：US10593683B2

公开(公告)日：2020-03-17

申请号：US16275380

申请日：2019-02-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Tamae Moriwaka ,  Yuta Endo

IPC: H01L29/10 ,  H01L27/115 ,  H01L29/786 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/06 ,  G11C7/16 ,  G11C8/14 ,  G11C11/403 ,  G11C11/408 ,  G11C11/24 ,  H01L29/24

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j-1th sub memory cell.

公开(公告)号：US09917209B2

公开(公告)日：2018-03-13

申请号：US15192312

申请日：2016-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hideomi Suzawa ,  Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshiya Endo ,  Mitsuhiro Ichijo

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78651 ,  H01L29/7869

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

公开(公告)号：US09666720B2

公开(公告)日：2017-05-30

申请号：US14269819

申请日：2014-05-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Hitomi Sato ,  Kosei Noda ,  Yuta Endo ,  Mizuho Ikarashi ,  Keitaro Imai ,  Atsuo Isobe ,  Yutaka Okazaki

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: It is an object to manufacture a semiconductor device in which a transistor including an oxide semiconductor has normally-off characteristics, small fluctuation in electric characteristics, and high reliability. First, first heat treatment is performed on a substrate, a base insulating layer is formed over the substrate, an oxide semiconductor layer is formed over the base insulating layer, and the step of performing the first heat treatment to the step of forming the oxide semiconductor layer are performed without exposure to the air. Next, after the oxide semiconductor layer is formed, second heat treatment is performed. An insulating layer from which oxygen is released by heating is used as the base insulating layer.

公开(公告)号：US09653611B2

公开(公告)日：2017-05-16

申请号：US14637542

申请日：2015-03-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Tamae Moriwaka ,  Yuta Endo

IPC: H01L29/10 ,  H01L29/786 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/06 ,  G11C7/16 ,  G11C8/14 ,  G11C11/403 ,  G11C11/408

CPC classification number: H01L27/115 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  G11C11/4085 ,  H01L27/0688 ,  H01L27/11551 ,  H01L27/1156 ,  H01L29/24 ,  H01L29/7869

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≧2, the jth sub memory cell is arranged over the j−1th sub memory cell.

公开(公告)号：US09647010B2

公开(公告)日：2017-05-09

申请号：US14141806

申请日：2013-12-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yuta Endo

IPC: H01L29/10 ,  H01L27/12

CPC classification number: H01L27/1255 ,  G02F1/1368 ,  G02F2001/136236 ,  G02F2001/13685 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/1296 ,  H01L29/7869

Abstract: A semiconductor device with high aperture ratio is provided. The semiconductor device includes a transistor and a capacitor having a pair of electrodes. An oxide semiconductor layer formed over the same insulating surface is used for a channel formation region of the transistor and one of the electrodes of the capacitor. The other electrode of the capacitor is a transparent conductive film. One electrode of the capacitor is electrically connected to a wiring formed over the insulating surface over which a source electrode or a drain electrode of the transistor is provided, and the other electrode of the capacitor is electrically connected to one of the source electrode and the drain electrode of the transistor.

公开(公告)号：US09397225B2

公开(公告)日：2016-07-19

申请号：US14602878

申请日：2015-01-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Imoto ,  Tetsunori Maruyama ,  Yuta Endo

IPC: H01L21/44 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: In the transistor including an oxide semiconductor film, which includes a film for capturing hydrogen from the oxide semiconductor film (a hydrogen capture film) and a film for diffusing hydrogen (a hydrogen permeable film), hydrogen is transferred from the oxide semiconductor film to the hydrogen capture film through the hydrogen permeable film by heat treatment. Specifically, a base film or a protective film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment.

公开(公告)号：US09276129B2

公开(公告)日：2016-03-01

申请号：US14534220

申请日：2014-11-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yuta Endo

IPC: H01L29/786 ,  H01L51/05 ,  H01L29/66 ,  H01L21/66 ,  H01L23/00

CPC classification number: H01L29/7869 ,  H01L22/10 ,  H01L23/564 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object of an embodiment of the present invention is to manufacture a highly-reliable semiconductor device comprising a transistor including an oxide semiconductor, in which change of electrical characteristics is small. In the transistor including an oxide semiconductor, oxygen-excess silicon oxide (SiOX (X>2)) is used for a base insulating layer of a top-gate structure or for a protective insulating layer of a bottom-gate structure. By using the oxygen-excess silicon oxide, oxygen is discharged from the insulating layer, and oxygen deficiency of an oxide semiconductor layer and the interface state density between the oxide semiconductor layer and the base insulating layer or the protective insulating layer can be reduced, so that the highly-reliable semiconductor device in which change of electrical characteristics is small can be manufactured.

Abstract translation: 本发明的一个实施例的目的是制造一种包括氧化物半导体的晶体管的高度可靠的半导体器件，其中电特性的变化小。 在包括氧化物半导体的晶体管中，氧过剩氧化硅（SiOX（X> 2））用于顶栅结构的基极绝缘层或底栅结构的保护绝缘层。 通过使用氧过剩的氧化硅，从绝缘层排出氧，氧化物半导体层的氧缺乏和氧化物半导体层与基底绝缘层或保护绝缘层之间的界面态密度可以降低，因此 可以制造电特性变化小的高可靠性的半导体装置。

公开(公告)号：US09012913B2

公开(公告)日：2015-04-21

申请号：US13733536

申请日：2013-01-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kosei Noda ,  Yuta Endo

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L29/04

CPC classification number: H01L29/78693 ,  H01L27/1255 ,  H01L29/04 ,  H01L29/785 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a fin-type transistor having an oxide semiconductor in a channel formation region in which the channel formation region comprising an oxide semiconductor is three-dimensionally structured and a gate electrode is arranged to extend over the channel formation region. Specifically, the fin-type transistor comprises: an insulator protruding from a substrate plane; an oxide semiconductor film extending beyond the insulator; a gate insulating film over the oxide semiconductor film; and a gate electrode over and extending beyond the oxide semiconductor film. This structure allows the expansion of the width of the channel formation region, which enables the miniaturization and high integration of a semiconductor device having the transistor. Additionally, the extremely small off-state current of the transistor contributes to the formation of a semiconductor device with significantly reduced power consumption.

Abstract translation: 提供了在通道形成区域中具有氧化物半导体的翅片型晶体管，其中包括氧化物半导体的沟道形成区域是三维构造的，并且栅电极被布置成在沟道形成区域上延伸。 具体地，鳍型晶体管包括：从基板平面突出的绝缘体; 延伸超过绝缘体的氧化物半导体膜; 氧化物半导体膜上的栅极绝缘膜; 以及在氧化物半导体膜之上并延伸超过氧化物半导体膜的栅电极。 这种结构允许扩大通道形成区域的宽度，这使得能够使具有晶体管的半导体器件的小型化和高集成化。 此外，晶体管的非常小的截止状态电流有助于形成具有显着降低的功耗的半导体器件。

公开(公告)号：US20150001533A1

公开(公告)日：2015-01-01

申请号：US14313591

申请日：2014-06-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hideaki Kuwabara ,  Yuta Endo ,  Mari Tateishi ,  Masahiro Takahashi

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/04 ,  H01L29/0657 ,  H01L29/42384 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device including an oxide semiconductor. The device has a stacked-layer structure including an oxide semiconductor layer and an insulating layer in contact therewith. The oxide semiconductor layer includes a first layer where a channel is formed and a second layer which is between the first layer and the insulating layer and whose energy of the bottom of the conduction band is closer to the vacuum level than that of the first layer. The second layer serves as a barrier layer preventing formation of defect states between the channel and the insulating layer. The first layer and the second layer include a minute crystal part in which periodic atomic arrangement is not observed macroscopically or long-range order in atomic arrangement is not observed macroscopically. For example, a region with a size of 1 nm to 10 nm includes a crystal part having periodic atomic order.

Abstract translation: 提供包括氧化物半导体的高度可靠的半导体器件。 该器件具有包括氧化物半导体层和与其接触的绝缘层的堆叠层结构。 氧化物半导体层包括其中形成沟道的第一层和位于第一层和绝缘层之间的第二层，其导带底部的能量比第一层更靠近真空度。 第二层用作防止在通道和绝缘层之间形成缺陷状态的阻挡层。 第一层和第二层包括在宏观上没有观察到周期性原子排列的微小晶体部分，宏观上没有观察到原子排列的长距离顺序。 例如，尺寸为1nm至10nm的区域包括具有周期性原子级的晶体部分。

公开(公告)号：US08884294B2

公开(公告)日：2014-11-11

申请号：US13911502

申请日：2013-06-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yuta Endo

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L22/10 ,  H01L23/564 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object of an embodiment of the present invention is to manufacture a highly-reliable semiconductor device comprising a transistor including an oxide semiconductor, in which change of electrical characteristics is small. In the transistor including an oxide semiconductor, oxygen-excess silicon oxide (SiOX (X>2)) is used for a base insulating layer of a top-gate structure or for a protective insulating layer of a bottom-gate structure. By using the oxygen-excess silicon oxide, oxygen is discharged from the insulating layer, and oxygen deficiency of an oxide semiconductor layer and the interface state density between the oxide semiconductor layer and the base insulating layer or the protective insulating layer can be reduced, so that the highly-reliable semiconductor device in which change of electrical characteristics is small can be manufactured.

Abstract translation: 本发明的一个实施例的目的是制造一种包括氧化物半导体的晶体管的高度可靠的半导体器件，其中电特性的变化小。 在包括氧化物半导体的晶体管中，氧过剩氧化硅（SiOX（X> 2））用于顶栅结构的基极绝缘层或底栅结构的保护绝缘层。 通过使用氧过剩的氧化硅，从绝缘层排出氧，氧化物半导体层的氧缺乏和氧化物半导体层与基底绝缘层或保护绝缘层之间的界面态密度可以降低，因此 可以制造电特性变化小的高可靠性的半导体装置。