公开(公告)号：US07781330B2

公开(公告)日：2010-08-24

申请号：US11878508

申请日：2007-07-25

申请人： Chae-Iyoung Kim ,  Chang-ki Hong ,  Bo-un Yoon ,  Sung-ho Shin ,  Byoung-ho Kwon

发明人： Chae-Iyoung Kim ,  Chang-ki Hong ,  Bo-un Yoon ,  Sung-ho Shin ,  Byoung-ho Kwon

IPC分类号： H01L21/44

CPC分类号： H01L21/76816 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/7688 ,  Y10S438/947

摘要： Methods of fabricating a semiconductor device is provided. The methods include forming an interlayer insulating layer on a semiconductor substrate having a first region and a second region. First contact plugs may be formed on a portion of the second region to fill a plurality of first contact holes. A plurality of first contact mask layers and a plurality of first dummy mask layers may be formed on the interlayer insulating layer. The first contact mask layers may be formed in the first region. The first dummy mask layers may be formed in the second region. A plurality of second contact mask layers may be formed between two adjacent first contact mask layers. A plurality of second dummy mask layers may be formed between two adjacent first dummy mask layers. The interlayer insulating layer may be etched using the first contact mask layers and the second contact mask layers as etch stop layers to form a plurality of second contact holes through the interlayer insulating layer formed in the first region.

摘要翻译： 提供制造半导体器件的方法。 所述方法包括在具有第一区域和第二区域的半导体衬底上形成层间绝缘层。 第一接触塞可以形成在第二区域的一部分上以填充多个第一接触孔。 多个第一接触掩模层和多个第一伪掩模层可以形成在层间绝缘层上。 第一接触掩模层可以形成在第一区域中。 第一虚拟掩模层可以形成在第二区域中。 可以在两个相邻的第一接触掩模层之间形成多个第二接触掩模层。 可以在两个相邻的第一虚拟掩模层之间形成多个第二虚拟掩模层。 可以使用第一接触掩模层和第二接触掩模层作为蚀刻停止层来蚀刻层间绝缘层，以形成穿过形成在第一区域中的层间绝缘层的多个第二接触孔。

公开(公告)号：US20090159952A1

公开(公告)日：2009-06-25

申请号：US12397543

申请日：2009-03-04

申请人： Byoung-ho KWON ,  Chang-ki Hong ,  Bo-un Yoon ,  Jun-yong Kim

发明人： Byoung-ho KWON ,  Chang-ki Hong ,  Bo-un Yoon ,  Jun-yong Kim

IPC分类号： H01L29/68

CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529

摘要： A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stacked gate structures is formed in the cell array region, and each has a structure in which a lower structure, a conductive pattern and a first sacrificial layer pattern are stacked. Junction regions are formed in the cell array region. Spacers are formed on side walls of the first and second pre-stacked gate structures. A second sacrificial layer pattern filling each space between the second pre-stacked gate structures is formed. The first sacrificial layer pattern is removed from each of the first and second pre-stacked gate structures. A damascene metal layer pattern is formed in each of spaces of the first and second pre-stacked gate structures from which the first sacrificial layer pattern is removed, thus completing first and second stacked gate structures. The second sacrificial layer pattern is removed. A stop layer is formed on top surfaces of the first stacked gate structures, top surfaces and side walls of the second stacked gate structures, and a top surface of the substrate.

摘要翻译： 提供了一种制造使用该方法制造的非易失性存储器集成电路器件和非易失性存储器集成电路器件的方法。 器件隔离区域形成在衬底中以限定电池阵列区域和外围电路区域。 在单元阵列区域中形成多个第一和第二预叠层栅极结构，并且每个都具有堆叠下部结构，导电图案和第一牺牲层图案的结构。 结区域形成在单元阵列区域中。 间隔件形成在第一和第二预堆叠栅极结构的侧壁上。 形成填充第二预堆叠栅极结构之间的每个空间的第二牺牲层图案。 第一牺牲层图案从第一和第二预堆叠栅极结构中的每一个去除。 在第一和第二预堆叠栅极结构的每个空间中形成镶嵌金属层图案，从中去除第一牺牲层图案，从而完成第一和第二堆叠栅极结构。 去除第二牺牲层图案。 在第一层叠栅极结构的顶表面，第二堆叠栅结构的顶表面和侧壁以及衬底的顶表面上形成停止层。

公开(公告)号：US20090203213A1

公开(公告)日：2009-08-13

申请号：US12219985

申请日：2008-07-31

申请人： Jong-won Lee ,  Chang-ki Hong ,  Sang-yeob Han

发明人： Jong-won Lee ,  Chang-ki Hong ,  Sang-yeob Han

IPC分类号： C09K13/00 ,  H01L21/461

CPC分类号： H01L21/3212 ,  C09G1/02 ,  C09K3/1463

摘要： Provided may be a slurry composition for chemical mechanical polishing (CMP) and a CMP method using the same. For example, the slurry composition may include a first polishing inhibitor including at least one of PO43− or HPO42− and a second polishing inhibitor, which may be a C2-C10 hydrocarbon compound having —SO3H or —OSO3H. By using the slurry composition for CMP and a CMP method using the same, increased selectivity to SiN may be obtained.

摘要翻译： 可提供用于化学机械抛光（CMP）的浆料组合物和使用其的CMP方法。 例如，浆料组合物可以包括第一抛光抑制剂，其包括PO43-或HPO42-和至少一种抛光抑制剂，其可以是具有-SO 3 H或-OSO 3 H的C 2 -C 10烃化合物。 通过使用用于CMP的浆料组合物和使用其的CMP方法，可以获得对SiN的增加的选择性。

公开(公告)号：US06863592B2

公开(公告)日：2005-03-08

申请号：US10291357

申请日：2002-11-08

申请人： Jong-won Lee ,  Chang-ki Hong ,  Jae-dong Lee

发明人： Jong-won Lee ,  Chang-ki Hong ,  Jae-dong Lee

IPC分类号： B24B37/00 ,  C09G1/02 ,  C09K3/14 ,  H01L21/302 ,  H01L21/304 ,  H01L21/3105 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  B24B1/00

CPC分类号： H01L21/31053 ,  C09G1/02

摘要： CMP (chemical/mechanical polishing) slurries that can rapidly remove a target layer and can effectively passivate a polishing stopper, with high selectivity. In one aspect, a CMP slurry comprises metal oxide abrasive particles, a removal rate accelerator, an anionic polymeric passivation agent having a molecular weight in a range of about 1,000 to about 100,000, a C1-C12 anionic passivation agent, and water.

摘要翻译： CMP（化学/机械抛光）浆料，可以快速去除目标层，并可以高选择性有效钝化抛光终止剂。 在一个方面，CMP浆料包含金属氧化物磨料颗粒，去除速率促进剂，分子量在约1,000至约100,000范围内的阴离子聚合物钝化剂，C1-C12阴离子钝化剂和水。

公开(公告)号：US08338300B2

公开(公告)日：2012-12-25

申请号：US12219985

申请日：2008-07-31

申请人： Jong-won Lee ,  Chang-ki Hong ,  Sang-yeob Han

发明人： Jong-won Lee ,  Chang-ki Hong ,  Sang-yeob Han

IPC分类号： H01L21/302

CPC分类号： H01L21/3212 ,  C09G1/02 ,  C09K3/1463

摘要： Provided may be a slurry composition for chemical mechanical polishing (CMP) and a CMP method using the same. For example, the slurry composition may include a first polishing inhibitor including at least one of PO43− or HPO42− and a second polishing inhibitor, which may be a C2-C10 hydrocarbon compound having —SO3H or —OSO3H. By using the slurry composition for CMP and a CMP method using the same, increased selectivity to SiN may be obtained.

摘要翻译： 可提供用于化学机械抛光（CMP）的浆料组合物和使用其的CMP方法。 例如，浆料组合物可以包括第一抛光抑制剂，其包括PO43-或HPO42-和至少一种抛光抑制剂，其可以是具有-SO 3 H或-OSO 3 H的C 2 -C 10烃化合物。 通过使用用于CMP的浆料组合物和使用其的CMP方法，可以获得对SiN的增加的选择性。

公开(公告)号：US20050112894A1

公开(公告)日：2005-05-26

申请号：US10961411

申请日：2004-10-12

申请人： Jeong-heon Park ,  Jae-dong Lee ,  Sung-jun Kim ,  Chang-ki Hong

发明人： Jeong-heon Park ,  Jae-dong Lee ,  Sung-jun Kim ,  Chang-ki Hong

IPC分类号： H01L21/304 ,  C09G1/02 ,  H01L21/321 ,  H01L21/768 ,  H01L21/302 ,  H01L21/461

CPC分类号： C09G1/02 ,  H01L21/3212 ,  H01L21/7684

摘要： A first chemical mechanical polishing (CMP) slurry includes a polishing agent, an oxidant, a pH control additive, and an oxide film removal retarder which reduces a removal rate of the silicon oxide film. A second chemical mechanical polishing (CMP) slurry includes a polishing agent, an oxidant, a pH control additive, an oxide film removal retarder which reduces a removal rate of silicon oxide, and a defect prevention agent which inhibits scratch defects and/or corrosion defects at a surface of an aluminum film. In a one-step CMP process, either of the first or second slurry is used throughout CMP of an aluminum layer until an upper surface of an underlying silicon oxide layer is exposed. In a two-step CMP process, the first slurry is used in an initial CMP of the aluminum layer, and then the second slurry is used in a subsequent CMP until the upper surface of the underlying silicon layer is exposed.

摘要翻译： 第一化学机械抛光（CMP）浆料包括抛光剂，氧化剂，pH控制添加剂和降低氧化硅膜去除速率的氧化膜去除延迟剂。 第二化学机械抛光（CMP）浆料包括抛光剂，氧化剂，pH控制添加剂，降低氧化硅去除速率的氧化膜去除延迟剂，以及抑制刮擦缺陷和/或腐蚀缺陷的缺陷防止剂 在铝膜的表面。 在一步CMP工艺中，在铝层的整个CMP中使用第一或第二浆料中的任何一种，直到暴露底层氧化硅层的上表面。 在两步CMP工艺中，第一浆料用于铝层的初始CMP，然后将第二浆料用于随后的CMP，直到暴露下层硅层的上表面。

公开(公告)号：US07247256B2

公开(公告)日：2007-07-24

申请号：US10961411

申请日：2004-10-12

申请人： Jeong-heon Park ,  Jae-dong Lee ,  Sung-jun Kim ,  Chang-ki Hong

发明人： Jeong-heon Park ,  Jae-dong Lee ,  Sung-jun Kim ,  Chang-ki Hong

IPC分类号： C09K13/00

CPC分类号： C09G1/02 ,  H01L21/3212 ,  H01L21/7684

摘要： A first chemical mechanical polishing (CMP) slurry includes a polishing agent, an oxidant, a pH control additive, and an oxide film removal retarder which reduces a removal rate of the silicon oxide film. A second chemical mechanical polishing (CMP) slurry includes a polishing agent, an oxidant, a pH control additive, an oxide film removal retarder which reduces a removal rate of silicon oxide, and a defect prevention agent which inhibits scratch defects and/or corrosion defects at a surface of an aluminum film. In a one-step CMP process, either of the first or second slurry is used throughout CMP of an aluminum layer until an upper surface of an underlying silicon oxide layer is exposed. In a two-step CMP process, the first slurry is used in an initial CMP of the aluminum layer, and then the second slurry is used in a subsequent CMP until the upper surface of the underlying silicon layer is exposed.

摘要翻译： 第一化学机械抛光（CMP）浆料包括抛光剂，氧化剂，pH控制添加剂和降低氧化硅膜去除速率的氧化膜去除延迟剂。 第二化学机械抛光（CMP）浆料包括抛光剂，氧化剂，pH控制添加剂，降低氧化硅去除速率的氧化膜去除延迟剂，以及抑制刮擦缺陷和/或腐蚀缺陷的缺陷防止剂 在铝膜的表面。 在一步CMP工艺中，在铝层的整个CMP中使用第一或第二浆料中的任何一种，直到暴露底层氧化硅层的上表面。 在两步CMP工艺中，第一浆料用于铝层的初始CMP，然后将第二浆料用于随后的CMP，直到暴露下层硅层的上表面。

公开(公告)号：US06858452B2

公开(公告)日：2005-02-22

申请号：US10688610

申请日：2003-10-17

申请人： Jeong-heon Park ,  Chang-ki Hong ,  Jae-dong Lee ,  Young-rae Park ,  Ho-Young Kim

发明人： Jeong-heon Park ,  Chang-ki Hong ,  Jae-dong Lee ,  Young-rae Park ,  Ho-Young Kim

IPC分类号： H01L21/304 ,  H01L21/321 ,  H01L21/60 ,  H01L21/66

CPC分类号： H01L21/76897 ,  H01L21/3212 ,  H01L22/00

摘要： A method for isolating SAC pads of a semiconductor device, including determining a chemical mechanical polishing process time necessary to isolate the SAC pads a desired amount by referring to a relationship equation between the extent of isolation of the self-aligned contact pads and the chemical-mechanical polishing process time. The chemical mechanical polishing process is performed for the determined process time on the semiconductor device to isolate the self-aligned contact pads the desired amount. The relationship equation is determined using a test semiconductor device.

摘要翻译： 一种用于分离半导体器件的SAC焊盘的方法，包括通过参考自对准接触焊盘的隔离程度与化学机械抛光处理时间之间的关系式来确定将SAC焊盘隔离所需量所需的化学机械抛光处理时间， 机械抛光加工时间。 对半导体器件上确定的处理时间执行化学机械抛光工艺，以将自对准接触焊盘隔离所需量。 使用测试半导体器件确定关系式。

公开(公告)号：US20150162221A1

公开(公告)日：2015-06-11

申请号：US14580513

申请日：2014-12-23

申请人： Hyo-San Lee ,  Chang-ki Hong ,  Kun-tack Lee ,  Jeong-nam Han

发明人： Hyo-San Lee ,  Chang-ki Hong ,  Kun-tack Lee ,  Jeong-nam Han

IPC分类号： H01L21/67 ,  H01J37/32

CPC分类号： H01L21/67017 ,  H01J37/32449 ,  H01J37/32467 ,  H01J37/32715 ,  H01J37/32743 ,  H01J37/32816 ,  H01J2237/334 ,  H01J2237/335 ,  H01L21/67028 ,  H01L21/67069 ,  H01L21/67276 ,  Y10T137/2931 ,  Y10T137/4673

摘要： Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers. The wafer treatment method involves performing a predetermined treatment such as etching, cleaning or drying on wafers within only one of the plurality of chambers, followed by wafer treatment on the succeeding chamber, and thus allowing for sequential wafer treatment within each of the plurality of chambers.

摘要翻译： 提供了一种使用超临界流体处理晶片的设备和方法。 晶片处理装置包括多个室; 供应超临界状态的第一流体的第一供应源; 供应第一流体和第二流体的混合物的第二供应源; 多个第一和第二阀; 以及控制器，选择用于晶片处理的多个室的第一室，以控制多个第一阀中的每一个的打开/关闭状态，使得第一流体仅能够供应到多个室的第一室，并且选择 多个室中的第二室，用于控制多个第二阀中的每一个的打开/关闭状态，使得第一流体和第二流体的混合物只能供应到多个室的第二室。 晶片处理方法包括对多个室内的仅一个中的晶片进行蚀刻，清洗或干燥等预定处理，然后在后续室进行晶片处理，从而允许在多个室内进行顺序晶片处理 。

公开(公告)号：US07857939B2

公开(公告)日：2010-12-28

申请号：US11725829

申请日：2007-03-20

申请人： Hyo-san Lee ,  Chang-ki Hong ,  Kun-tack Lee ,  Jeong-nam Han

发明人： Hyo-san Lee ,  Chang-ki Hong ,  Kun-tack Lee ,  Jeong-nam Han

IPC分类号： B67D5/54

CPC分类号： H01L21/67017 ,  H01J37/32449 ,  H01J37/32467 ,  H01J37/32715 ,  H01J37/32743 ,  H01J37/32816 ,  H01J2237/334 ,  H01J2237/335 ,  H01L21/67028 ,  H01L21/67069 ,  H01L21/67276 ,  Y10T137/2931 ,  Y10T137/4673

摘要： Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers. The wafer treatment method involves performing a predetermined treatment such as etching, cleaning or drying on wafers within only one of the plurality of chambers, followed by wafer treatment on the succeeding chamber, and thus allowing for sequential wafer treatment within each of the plurality of chambers.

摘要翻译： 提供了一种使用超临界流体处理晶片的设备和方法。 晶片处理装置包括多个室; 供应超临界状态的第一流体的第一供应源; 供应第一流体和第二流体的混合物的第二供应源; 多个第一和第二阀; 以及控制器，选择用于晶片处理的多个室的第一室，以控制多个第一阀中的每一个的打开/关闭状态，使得第一流体仅能够供应到多个室的第一室，并且选择 多个室中的第二室，用于控制多个第二阀中的每一个的打开/关闭状态，使得第一流体和第二流体的混合物只能供应到多个室的第二室。 晶片处理方法包括对多个室内的仅一个中的晶片进行蚀刻，清洗或干燥等预定处理，然后在后续室进行晶片处理，从而允许在多个室内进行顺序晶片处理 。